Matthias Bucher
Matthias Bucher
School of Electrical & Computer Engineering, Technical University of Crete (TUC), Chania, Greece
Η διεύθυνση ηλεκτρονικού ταχυδρομείου έχει επαληθευτεί στον τομέα
Παρατίθεται από
Παρατίθεται από
The EPFL-EKV MOSFET Model Equations for Simulation, Model Version 2.6
M Bucher, C Lallement, C Enz, F Théodoloz, F Krummenacher
Technical Report, Eletronics Laboratories (LEG), Swiss Federal Institute of …, 1996
An efficient parameter extraction methodology for the EKV MOST model
M Bucher, C Lallement, CC Enz
Proceedings of International Conference on Microelectronic Test Structures …, 1996
Inversion charge linearization in MOSFET modeling and rigorous derivation of the EKV compact model
JM Sallese, M Bucher, F Krummenacher, P Fazan
Solid-State Electronics 47 (4), 677-683, 2003
Design-oriented characterization of CMOS over the continuum of inversion level and channel length
DM Binkley, M Bucher, D Foty
ICECS 2000. 7th IEEE International Conference on Electronics, Circuits and …, 2000
Comparison of a BSIM3V3 and EKV MOSFET model for a 0.5/spl mu/m CMOS process and implications for analog circuit design
SC Terry, JM Rochelle, DM Binkley, BJ Blalock, DP Foty, M Bucher
IEEE transactions on nuclear science 50 (4), 915-920, 2003
An adjusted constant-current method to determine saturated and linear mode threshold voltage of MOSFETs
A Bazigos, M Bucher, J Assenmacher, S Decker, W Grabinski, ...
IEEE Transactions on Electron Devices 58 (11), 3751-3758, 2011
Accurate MOS modelling for analog circuit simulation using the EKV model
M Bucher, C Lallement, C Enz, F Krummenacher
1996 IEEE International Symposium on Circuits and Systems. Circuits and …, 1996
Improved analytical modeling of polysilicon depletion in MOSFETs for circuit simulation
JM Sallese, M Bucher, C Lallement
Solid-State Electronics 44 (6), 905-912, 2000
Compact model of drain current in short-channel triple-gate FinFETs
N Fasarakis, A Tsormpatzoglou, DH Tassis, I Pappas, K Papathanasiou, ...
IEEE transactions on electron devices 59 (7), 1891-1898, 2012
Analytical MOS transistor modelling for analog circuit simulation
M Bucher
Verlag nicht ermittelbar, 2000
Estimating key parameters in the EKV MOST model for analogue design and simulation
GAS Machado, CC Enz, M Bucher
Proceedings of ISCAS'95-International Symposium on Circuits and Systems 3 …, 1995
Device design engineering for optimum analog/RF performance of nanoscale DG MOSFETs
RK Sharma, M Bucher
IEEE Transactions on Nanotechnology 11 (5), 992-998, 2012
The EKV 3.0 compact MOS transistor model: accounting for deep-submicron aspects
M Bucher, C Enz, F Krummenacher, JM Sallese, C Lallement, AS Porret
Proc. MSM Int. Conf., Nanotech 2002, 670-673, 2002
Modelling and characterization of non-uniform substrate doping
C Lallement, M Bucher, C Enz
Solid-State Electronics 41 (12), 1857-1861, 1997
Scalable Gm/I based MOSFET model
M Bucher, C Lallement, C Enz, F Théodoloz, F Krummenacher
Int. Semicond. Dev. Research Symp.(ISDRS’97), 615-618, 1997
CMOS small-signal and thermal noise modeling at high frequencies
A Antonopoulos, M Bucher, K Papathanasiou, N Mavredakis, N Makris, ...
IEEE transactions on electron devices 60 (11), 3726-3733, 2013
Analysis of transconductances at all levels of inversion in deep submicron CMOS
M Bucher, D Kazazis, F Krummenacher, D Binkley, D Foty, Y Papananos
9th International Conference on Electronics, Circuits and Systems 3, 1183-1186, 2002
A physics-based analytical compact model for the drift region of the HV-MOSFET
A Bazigos, F Krummenacher, JM Sallese, M Bucher, E Seebacher, ...
IEEE transactions on electron devices 58 (6), 1710-1721, 2011
Accounting for quantum effects and polysilicon depletion from weak to strong inversion in a charge-based design-oriented MOSFET model
C Lallement, JM Sallese, M Bucher, W Grabinski, PC Fazan
IEEE Transactions on Electron Devices 50 (2), 406-417, 2003
Compact modeling of nanoscale trapezoidal FinFETs
N Fasarakis, TA Karatsori, A Tsormpatzoglou, DH Tassis, ...
IEEE Transactions on Electron Devices 61 (2), 324-332, 2013
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