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Haoxing Ren (Mark)
Haoxing Ren (Mark)
Verified email at nvidia.com - Homepage
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Cited by
Year
Dreamplace: Deep learning toolkit-enabled gpu acceleration for modern vlsi placement
Y Lin, S Dhar, W Li, H Ren, B Khailany, DZ Pan
Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019
2222019
RouteNet: Routability prediction for mixed-size designs using convolutional neural network
Z Xie, YH Huang, GQ Fang, H Ren, SY Fang, Y Chen, J Hu
2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2018
1782018
High performance graph convolutional networks with applications in testability analysis
Y Ma, H Ren, B Khailany, H Sikka, L Luo, K Natarajan, B Yu
Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019
1192019
Sensitivity guided net weighting for placement driven synthesis
TY Wang, JL Tsai, CCP Chen
Proceedings of the 2004 international symposium on Physical design, 124-131, 2004
972004
RQL: Global placement via relaxed quadratic spreading and linearization
N Viswanathan, GJ Nam, CJ Alpert, P Villarrubia, H Ren, C Chu
Proceedings of the 44th annual Design Automation Conference, 453-458, 2007
892007
GRANNITE: Graph neural network inference for transferable power estimation
Y Zhang, H Ren, B Khailany
2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020
832020
Relative ordering circuit synthesis
M Cho, R Puri, H Ren, X Tang, H Xiang, MM Ziegler
US Patent 8,756,541, 2014
832014
Techniques for fast physical synthesis
CJ Alpert, SK Karandikar, Z Li, GJ Nam, ST Quay, H Ren, CN Sze, ...
Proceedings of the IEEE 95 (3), 573-599, 2007
832007
ParaGraph: Layout parasitics and device parameter prediction using graph neural networks
H Ren, GF Kokai, WJ Turner, TS Ku
2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020
812020
Diffusion-based placement migration
H Ren, DZ Pan, CJ Alpert, P Villarrubia
Proceedings of the 42nd annual Design Automation Conference, 515-520, 2005
812005
PowerNet: Transferable dynamic IR drop estimation via maximum convolutional neural network
Z Xie, H Ren, B Khailany, Y Sheng, S Santosh, J Hu, Y Chen
2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC), 13-18, 2020
742020
PRIMAL: Power inference using machine learning
Y Zhou, H Ren, Y Zhang, B Keller, B Khailany, Z Zhang
Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019
712019
DeltaSyn: An efficient logic difference optimizer for ECO synthesis
S Krishnaswamy, H Ren, N Modi, R Puri
Proceedings of the 2009 International Conference on Computer-Aided Design …, 2009
702009
Accelerating chip design with machine learning
B Khailany
Proceedings of the 2020 ACM/IEEE Workshop on Machine Learning for CAD, 33-33, 2020
692020
Converged large block and structured synthesis for high performance microprocessor designs
M Cho, VN Kravets, S Krishnaswamy, D Kucar, J Narasimhan, R Puri, ...
US Patent 8,271,920, 2012
522012
Routability-driven macro placement with embedded cnn-based prediction model
YH Huang, Z Xie, GQ Fang, TC Yu, H Ren, SY Fang, Y Chen, J Hu
2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 180-185, 2019
492019
Abcdplace: Accelerated batch-based concurrent detailed placement on multithreaded cpus and gpus
Y Lin, W Li, J Gu, H Ren, B Khailany, DZ Pan
IEEE transactions on computer-aided design of integrated circuits and …, 2020
482020
History-based VLSI legalization using network flow
M Cho, H Ren, H Xiang, R Puri
Proceedings of the 47th Design Automation Conference, 286-291, 2010
432010
Computational geometry based placement migration
T Luo, H Ren, CJ Alpert, DZ Pan
ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005 …, 2005
402005
Vs-quant: Per-vector scaled quantization for accurate low-precision neural network inference
S Dai, R Venkatesan, M Ren, B Zimmer, W Dally, B Khailany
Proceedings of Machine Learning and Systems 3, 873-884, 2021
372021
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