| TCAD simulation of SOI TFETs and calibration of non-local band-to-band tunneling model A Biswas, SS Dan, C Le Royer, W Grabinski, AM Ionescu Microelectronic Engineering 98, 334-337, 2012 | 129 | 2012 |
| RF distortion analysis with compact MOSFET models P Bendix, P Rakers, P Wagh, L Lemaitre, W Grabinski, CC McAndrew, ... Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat …, 2004 | 80 | 2004 |
| An adjusted constant-current method to determine saturated and linear mode threshold voltage of MOSFETs A Bazigos, M Bucher, J Assenmacher, S Decker, W Grabinski, ... IEEE Transactions on Electron Devices 58 (11), 3751-3758, 2011 | 75 | 2011 |
| Transistor level modeling for analog/RF IC design W Grabinski, B Nauwelaers, D Schreurs Springer Science & Business Media, 2006 | 55 | 2006 |
| Electrical modeling of a pressure sensor MOSFET JM Sallese, W Grabinski, V Meyer, C Bassin, P Fazan Sensors and Actuators A: Physical 94 (1-2), 53-58, 2001 | 49 | 2001 |
| Investigation of tunnel field-effect transistors as a capacitor-less memory cell A Biswas, N Dagtekin, W Grabinski, A Bazigos, C Le Royer, JM Hartmann, ... Applied Physics Letters 104 (9), 2014 | 48 | 2014 |
| Accounting for quantum effects and polysilicon depletion from weak to strong inversion in a charge-based design-oriented MOSFET model C Lallement, JM Sallese, M Bucher, W Grabinski, PC Fazan IEEE Transactions on Electron Devices 50 (2), 406-417, 2003 | 35 | 2003 |
| EKV3. 0: An advanced charge based MOS transistor model. A design-oriented MOS transistor compact model M Bucher, A Bazigos, F Krummenacher, JM Sallese, C Enz Transistor Level Modeling for Analog/RF IC Design, 67-95, 2006 | 29 | 2006 |
| Accumulation-mode gate-all-around Si nanowire nMOSFETs with sub-5 nm cross-section and high uniaxial tensile strain M Najmzadeh, D Bouvet, W Grabinski, JM Sallese, AM Ionescu Solid-state electronics 74, 114-120, 2012 | 24 | 2012 |
| Steep slope VO2switches for wide-band (DC-40 GHz) reconfigurable electronics WA Vitale, A Paone, M Fernández-Bolaños, A Bazigos, W Grabinski, ... 72nd Device Research Conference, 29-30, 2014 | 22 | 2014 |
| Power/HVMOS Devices Compact Modeling W Grabinski, T Gneiting Springer Verlag, 2010 | 22 | 2010 |
| Compact device modeling using Verilog-AMS and ADMS L Lemaitre, W Grabiński, C McAndrew Electron Technology: Internet Journal 35 (3), 1-5, 2003 | 18 | 2003 |
| Extended charges modeling for deep submicron CMOS M Bucher, JM Sallese, C Lallement, W Grabinski, CC Enz, ... Int. Semicond. Device Research Symp.(ISDRS’99), 397-400, 1999 | 16 | 1999 |
| Electron mobility extraction in triangular gate-all-around Si nanowire junctionless nMOSFETs with cross-section down to 5 nm M Najmzadeh, M Berthomé, JM Sallese, W Grabinski, AM Ionescu Solid-state electronics 98, 55-62, 2014 | 15 | 2014 |
| A novel extraction method and compact model for the steepness estimation of FDSOI TFET lateral junction SS Dan, A Biswas, C Le Royer, W Grabinski, AM Ionescu IEEE electron device letters 33 (2), 140-142, 2011 | 14 | 2011 |
| Compact modelling of ultra deep submicron CMOS devices W GRABIŃSKI, JM SALLESE, M BUCHER, F KRUMMENACHER Bulletin of the Polish Academy of Sciences. Technical Sciences 50, 2002 | 14 | 2002 |
| Advancements in DC and RF Mosfet modeling with the EPFL-EKV charge based model JM Sallese, W Grabinski, AS Porret, M Bucher, C Lallement, ... 8th Int. Conf. MIXDES, 45-52, 2001 | 12 | 2001 |
| Process control monitor based extraction procedure for statistical compact MOSFET modeling M Yakupov, D Tomaszewski, W Grabinski Proceedings of the 17th International Conference Mixed Design of Integrated …, 2010 | 11 | 2010 |
| Large-signal network analyzer measurements and their use in device modeling E Vandamme, W Grabinski, D Schreurs, T Gneiting MIXDES 2002, 2002 | 10 | 2002 |
| „The EKV model parameter extraction based on its IC-CAP USERC implementation” W Grabinski, M Bucher, F Krummenacher Eur. IC-CAP Users Meet, 1999 | 9 | 1999 |
Jean-Michel SalleseSenior scientist - Ecole polytechnique Federale de LausanneVerified email at epfl.ch
