| A systematic approach for parallel CRC computations MHWAS MING-DER SHIEH, CH Chen, HF Lo Journal of information science and engineering 17, 445-461, 2001 | 92 | 2001 |
| Effective hybrid test program development for software-based self-testing of pipeline processor cores TH Lu, CH Chen, KJ Lee IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19 (3), 516-520, 2009 | 46 | 2009 |
| Software-based self-testing with multiple-level abstractions for soft processor cores CH Chen, CK Wei, TH Lu, HW Gao IEEE transactions on very large scale integration (VLSI) systems 15 (5), 505-517, 2007 | 46 | 2007 |
| Fault-containment in cache memories for TMR redundant processor systems CH Chen, AK Somani IEEE Transactions on computers 48 (4), 386-397, 1999 | 32 | 1999 |
| Full system simulation with QEMU: An approach to multi-view 3D GPU design ST Shen, SY Lee, CH Chen Proceedings of 2010 IEEE International Symposium on Circuits and Systems …, 2010 | 26 | 2010 |
| A memory efficient architecture for deblocking filter in H. 264 using vertical processing order CM Chen, CH Chen 2005 International Conference on Intelligent Sensors, Sensor Networks and …, 2005 | 26 | 2005 |
| Configurable VLSI architecture for deblocking filter in H. 264/AVC CM Chen, CH Chen IEEE Transactions on Very Large Scale Integration (VLSI) Systems 16 (8 …, 2008 | 24 | 2008 |
| Proteus system architecture and organization AKSCMWRM Haralick, LGSJNHCH Chen, R Johnson, K Copper Proc. Fifth Int'l Parallel Processing Symp, 287-294, 1991 | 24 | 1991 |
| Energy-efficient trace reuse cache for embedded processors YY Tsai, CH Chen IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19 (9 …, 2010 | 21 | 2010 |
| Full system simulation and verification framework JW Lin, CC Wang, CY Chang, CH Chen, KJ Lee, YH Chu, JC Yeh, ... 2009 Fifth International Conference on Information Assurance and Security 1 …, 2009 | 19 | 2009 |
| System-level development and verification framework for high-performance system accelerator CC Wang, RP Wong, JW Lin, CH Chen 2009 International Symposium on VLSI Design, Automation and Test, 359-362, 2009 | 19 | 2009 |
| A software-based test methodology for direct-mapped data cache YC Lin, YY Tsai, KJ Lee, CW Yen, CH Chen 2008 17th Asian Test Symposium, 363-368, 2008 | 18 | 2008 |
| An Efficient Architecture for Deblocking Filter in H. 264/AVC Video Coding. CM Chen, CH Chen Computer Graphics and Imaging, 177-181, 2005 | 17 | 2005 |
| Virtualization Technology for TCP/IP Offload Engine EH Chang, CC Wang, CT Liu, KC Chen, Chung-Ho Chen IEEE Transactions on Cloud Computing, 2014 | 16 | 2014 |
| Window architecture for deblocking filter in H. 264/AVC CM Chen, JP Zeng, CH Chen, CT Yu, YP Chang 2006 IEEE International Symposium on Signal Processing and Information …, 2006 | 15 | 2006 |
| An efficient wakeup design for energy reduction in high-performance superscalar processors KS Hsiao, CH Chen Proceedings of the 2nd conference on Computing frontiers, 353-360, 2005 | 15 | 2005 |
| Proteus: a reconfigurable computational network for computer vision RM Haralick, AK Somani, C Wittenbrink, R Johnson, K Cooper, ... Machine Vision and Applications 8, 85-100, 1995 | 14 | 1995 |
| Microarchitecture support for improving the performance of load target prediction CH Chen, A Wu Proceedings of 30th Annual International Symposium on Microarchitecture, 228-234, 1997 | 13 | 1997 |
| An easy-to-use approach for practical bus-based system design CH Chen, FF Lin IEEE Transactions on Computers 48 (8), 780-793, 1999 | 11 | 1999 |
| A cache protocol for error detection and recovery in fault-tolerant computing systems CH Chen, AK Somani Proceedings of IEEE 24th International Symposium on Fault-Tolerant Computing …, 1994 | 11 | 1994 |
Arun SomaniProfessor of electrical and Computer Engineering, Iowa State UniversityVerified email at iastate.edu
