Inferring fine-grained control flow inside {SGX} enclaves with branch shadowing S Lee, MW Shih, P Gera, T Kim, H Kim, M Peinado 26th USENIX Security Symposium (USENIX Security 17), 557-574, 2017 | 645 | 2017 |
Batch-aware unified memory management in GPUs for irregular workloads H Kim, J Sim, P Gera, R Hadidi, H Kim Proceedings of the Twenty-Fifth International Conference on Architectural …, 2020 | 81 | 2020 |
Traversing Large Graphs on GPUs with Unified Memory P Gera, H Kim, P Sao, H Kim, D Bader Proceedings of the VLDB Endowment 13 (7), 1119-1133, 2020 | 57 | 2020 |
Performance characterisation and simulation of Intel's integrated GPU architecture P Gera, H Kim, H Kim, S Hong, V George, CK Luk 2018 IEEE International Symposium on Performance Analysis of Systems and …, 2018 | 38 | 2018 |
3-D stacked memory with reconfigurable compute logic MT Chang, P Gera, D Niu, H Zheng US Patent 11,079,936, 2021 | 35 | 2021 |
A supernodal all-pairs shortest path algorithm P Sao, R Kannan, P Gera, R Vuduc Proceedings of the 25th ACM SIGPLAN Symposium on Principles and Practice of …, 2020 | 27 | 2020 |
Traversing Large Compressed Graphs on GPUs P Gera, H Kim 2023 IEEE International Parallel and Distributed Processing Symposium (IPDPS …, 2023 | 2 | 2023 |
Overcoming Memory Capacity Constraints for Large Graph Applications on GPUs. P Gera Georgia Institute of Technology, Atlanta, GA, USA, 2021 | 2 | 2021 |
Louvre: Lightweight Ordering Using Versioning for Release Consistency P Kumar, P Gera, H Kim, H Kim arXiv preprint arXiv:1710.10746, 2017 | | 2017 |