Speculative multithreaded processors P Marcuello, A González, J Tubella Proceedings of the 12th international conference on Supercomputing, 77-84, 1998 | 224 | 1998 |
Control speculation in multithreaded processors through dynamic loop detection J Tubella, A Gonzalez Proceedings 1998 Fourth International Symposium on High-Performance Computer …, 1998 | 120 | 1998 |
Value prediction for speculative multithreaded architectures P Marcuello, J Tubella, A Gonzalez MICRO-32. Proceedings of the 32nd Annual ACM/IEEE International Symposium on …, 1999 | 112 | 1999 |
Trace-level reuse A González, J Tubella, C Molina Proceedings of the 1999 International Conference on Parallel Processing, 30-37, 1999 | 107 | 1999 |
Dynamic removal of redundant computations C Molina, A Gonzalez, J Tubella Proceedings of the 13th international conference on Supercomputing, 474-481, 1999 | 74 | 1999 |
Formulación de los objetivos de una asignatura en tres niveles jerárquicos JJ Navarro, M Valero García, F Sánchez-Carracedo, J Tubella Asociación de Enseñantes Universitarios de la Informática (AENUI), 2000 | 67 | 2000 |
Non redundant data cache C Molina, C Aliagas, M García, A González, J Tubella Proceedings of the 2003 international symposium on Low power electronics and …, 2003 | 45 | 2003 |
Thread partitioning and value prediction for exploiting speculative thread-level parallelism P Marcuello, A González, J Tubella IEEE Transactions on Computers 53 (2), 114-125, 2004 | 35 | 2004 |
Reducing memory traffic via redundant store instructions C Molina, A González, J Tubella International Conference on High-Performance Computing and Networking, 1246-1249, 1999 | 30 | 1999 |
An ultra low-power hardware accelerator for acoustic scoring in speech recognition H Tabani, JM Arnau, J Tubella, A Gonzalez 2017 26th International Conference on Parallel Architectures and Compilation …, 2017 | 23 | 2017 |
Trace-level speculative multithreaded architecture C Molina, A Gonzdalez, J Tubella Proceedings. IEEE International Conference on Computer Design: VLSI in …, 2002 | 19 | 2002 |
The performance potential of data value reuse A González, J Tubella, C Molina University of Politecenica of Catalunya Technical Report: UPC-DAC-1998-23, 1998 | 19 | 1998 |
A novel register renaming technique for out-of-order processors H Tabani, JM Arnau, J Tubella, A Gonzalez 2018 IEEE International Symposium on High Performance Computer Architecture …, 2018 | 17 | 2018 |
Performance analysis and optimization of automatic speech recognition H Tabani, JM Arnau, J Tubella, A González IEEE Transactions on Multi-Scale Computing Systems 4 (4), 847-860, 2017 | 16 | 2017 |
Chrysso: An integrated power manager for constrained many-core processors SS Jha, W Heirman, A Falcón, TE Carlson, K Van Craeynest, J Tubella, ... Proceedings of the 12th ACM International Conference on Computing Frontiers, 1-8, 2015 | 13 | 2015 |
Improving the resilience of an IDS against performance throttling attacks GS Shenoy, J Tubella, A González International Conference on Security and Privacy in Communication Systems …, 2012 | 11 | 2012 |
Work in progress-improving feedback using an automatic assessment tool D Jiménez-González, C Álvarez, D López, JM Parcerisa, J Alonso, ... 2008 38th Annual Frontiers in Education Conference, S3B-9-T1A-10, 2008 | 11 | 2008 |
A performance and area efficient architecture for intrusion detection systems GS Shenoy, J Tubella, A Gonz 2011 IEEE International Parallel & Distributed Processing Symposium, 301-310, 2011 | 10 | 2011 |
The multipath parallel execution model for Prolog A González, J Tubella World Scientific Publishing, 1994 | 10 | 1994 |
Shared resource aware scheduling on power-constrained tiled many-core processors SS Jha, W Heirman, A Falcón, J Tubella, A González, L Eeckhout Proceedings of the ACM International Conference on Computing Frontiers, 365-368, 2016 | 9 | 2016 |