| Desynchronization: Synthesis of asynchronous circuits from synchronous specifications J Cortadella, A Kondratyev, L Lavagno, CP Sotiriou IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2006 | 283 | 2006 |
| Data synchronization issues in GALS SoCs R Dobkin, R Ginosar, CP Sotiriou 10th International Symposium on Asynchronous Circuits and Systems, 2004 …, 2004 | 184 | 2004 |
| Handshake protocols for de-synchronization I Blunno, J Cortadella, A Kondratyev, L Lavagno, K Lwin, C Sotiriou 10th International Symposium on Asynchronous Circuits and Systems, 2004 …, 2004 | 146 | 2004 |
| Coping with the variability of combinational logic delays J Cortadella, A Kondratyev, L Lavagno, C Sotiriou IEEE International Conference on Computer Design: VLSI in Computers and …, 2004 | 97 | 2004 |
| High rate data synchronization in GALS SoCs R Dobkin, R Ginosar, CP Sotiriou IEEE Transactions on Very Large Scale Integration (VLSI) Systems 14 (10 …, 2006 | 74 | 2006 |
| A fully-automated desynchronization flow for synchronous circuits N Andrikos, L Lavagno, D Pandini, CP Sotiriou Proceedings of the 44th annual Design Automation Conference, 982-985, 2007 | 73 | 2007 |
| A concurrent model for de-synchronization J Cortadella, A Kondratyev, L Lavagno, C Sotiriou Proc. Intl. Workshop on Logic Synthesis, 294-301, 2003 | 43 | 2003 |
| From synchronous to asynchronous: an automatic approach J Cortadella, A Kondratyev, L Lavagno, K Lwin, C Sotiriou Proceedings Design, Automation and Test in Europe Conference and Exhibition …, 2004 | 37 | 2004 |
| Implementing asynchronous circuits using a conventional EDA tool-flow CP Sotiriou Proceedings of the 39th annual Design Automation Conference, 415-418, 2002 | 37 | 2002 |
| Controlling event spacing in self-timed rings V Zebilis, CP Sotiriou 11th IEEE International Symposium on Asynchronous Circuits and Systems, 109-115, 2005 | 29 | 2005 |
| Automating the design of an asynchronous DLX microprocessor M Amde, I Blunno, CP Sotiriou Proceedings of the 40th annual Design Automation Conference, 502-507, 2003 | 28 | 2003 |
| Data flow obfuscation: A new paradigm for obfuscating circuits KZ Azar, HM Kamali, S Roshanisefat, H Homayoun, CP Sotiriou, A Sasan IEEE Transactions on Very Large Scale Integration (VLSI) Systems 29 (4), 643-656, 2021 | 27 | 2021 |
| Asynchronous, multi-rail, asymmetric-phase, static digital logic with completion detection and method for designing the same C Sotiriou US Patent App. 11/283,070, 2006 | 22 | 2006 |
| De-synchronization: Asynchronous circuits from synchronous specifications CP Sotiriou, L Lavagno IEEE International [Systems-on-Chip] SOC Conference, 2003. Proceedings., 165-168, 2003 | 20 | 2003 |
| System and method of determining the speed of digital application specific integrated circuits CP Sotiriou US Patent 7,318,003, 2008 | 17 | 2008 |
| System and method of determining the speed of digital application specific integrated circuits CP Sotiriou US Patent 7,318,003, 2008 | 17 | 2008 |
| System and method of determining the speed of digital application specific integrated circuits CP Sotiriou US Patent 7,318,003, 2008 | 17 | 2008 |
| System and method of determining the speed of digital application specific integrated circuits CP Sotiriou US Patent 7,318,003, 2008 | 17 | 2008 |
| Gate delay estimation with library compatible current source models and effective capacitance D Garyfallou, S Simoglou, N Sketopoulos, C Antoniadis, CP Sotiriou, ... IEEE Transactions on Very Large Scale Integration (VLSI) Systems 29 (5), 962-972, 2021 | 15 | 2021 |
| System and method of determining the speed of digital application specific integrated circuits CP Sotiriou US Patent 7,318,003, 2008 | 14 | 2008 |
Jordi CortadellaUniversitat Politècnica de CatalunyaΗ διεύθυνση ηλεκτρονικού ταχυδρομείου έχει επαληθευτεί στον τομέα upc.edu
