emmanuelle encrenaz
emmanuelle encrenaz
associate professor of computer science, University Pierre and Marie Curie
Verified email at lip6.fr
Title
Cited by
Cited by
Year
Electromagnetic fault injection: towards a fault model on a 32-bit microcontroller
N Moro, A Dehbaoui, K Heydemann, B Robisson, E Encrenaz
2013 Workshop on Fault Diagnosis and Tolerance in Cryptography, 77-88, 2013
1642013
An inverse method for parametric timed automata
É André, T Chatain, L Fribourg, E Encrenaz
International Journal of Foundations of Computer Science 20 (05), 819-836, 2009
1162009
Data decision diagrams for Petri net analysis
JM Couvreur, E Encrenaz, E Paviot-Adet, D Poitrenaud, PA Wacrenier
International Conference on Application and Theory of Petri Nets, 101-120, 2002
1032002
Formal verification of a software countermeasure against instruction skip attacks
N Moro, K Heydemann, E Encrenaz, B Robisson
Journal of Cryptographic Engineering 4 (3), 145-156, 2014
842014
A tool for automatic detection of deadlock in wormhole networks on chip
S Taktak, JL Desbarbieux, E Encrenaz
ACM Transactions on Design Automation of Electronic Systems (TODAES) 13 (1 …, 2008
402008
Timed verification of the generic architecture of a memory circuit using parametric timed automata
R Chevallier, E Encrenaz-Tiphene, L Fribourg, W Xu
Formal Methods in System Design 34 (1), 59-81, 2009
332009
Experimental evaluation of two software countermeasures against fault attacks
N Moro, K Heydemann, A Dehbaoui, B Robisson, E Encrenaz
2014 IEEE International Symposium on Hardware-Oriented Security and Trust …, 2014
272014
An inverse method for parametric timed automata
É André, T Chatain, L Fribourg, E Encrenaz
Electronic Notes in Theoretical Computer Science 223, 29-46, 2008
232008
Efficient design and evaluation of countermeasures against fault attacks using formal verification
L Goubet, K Heydemann, E Encrenaz, R De Keulenaer
International Conference on Smart Card Research and Advanced Applications …, 2015
202015
Complementary formal approaches for dependability analysis
S Baarir, C Braunstein, R Clavel, E Encrenaz, JM Ilié, R Leveugle, ...
2009 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI …, 2009
192009
A symbolic relation for a subset of vhdl'87 descriptions and its application to symbolic model checking
E Encrenaz
Advanced Research Working Conference on Correct Hardware Design and …, 1995
171995
A polynomial algorithm to prove deadlock-freeness of wormhole networks
S Taktak, E Encrenaz, JL Desbarbieux
2010 18th Euromicro Conference on Parallel, Distributed and Network-based …, 2010
152010
Formal verification of a software countermeasure against instruction skip attacks.
K Heydemann, N Moro, E Encrenaz, B Robisson
IACR Cryptol. ePrint Arch. 2013, 679, 2013
122013
Design validation of zcsp with spin
V Beaudenon, E Encrenaz, JL Desbarbieux
Third International Conference on Application of Concurrency to System …, 2003
122003
Verification of the generic architecture of a memory circuit using parametric timed automata
R Chevallier, E Encrenaz-Tiphene, L Fribourg, W Xu
International Conference on Formal Modeling and Analysis of Timed Systems …, 2006
102006
Timing analysis of an embedded memory: SPSMALL
R Chevallier, E Encrenaz-Tiphene, L Fribourg, W Xu
Proceedings of the 10th WSEAS international conference on Circuits, 302-307, 2006
102006
Une Méthode de vérification de propriétés de programmes VHDL basée sur des modèles formels de réseaux de Petri
E Encrenaz
Paris 6, 1995
101995
Symbolic approach for side-channel resistance analysis of masked assembly codes
IB El Ouahma, QL Meunier, K Heydemann, E Encrenaz
Security Proofs for Embedded Systems, 2017
82017
Using VCI in a on-chip system around SPIN network
H Charlery, A Greiner, E Encrenaz, L Mortiez, A Andri
Proceedings of the 11th International Conference Mixed Design of Integrated …, 2004
82004
Side-channel robustness analysis of masked assembly codes using a symbolic approach
IB El Ouahma, QL Meunier, K Heydemann, E Encrenaz
Journal of Cryptographic Engineering 9 (3), 231-242, 2019
72019
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