‪Nikolaos Blias‬ - ‪Google Scholar‬

Get my own profile

Cited by

	All	Since 2019
Citations	6	6
h-index	2	2
i10-index	0	0

0

4

2

2021202220231 2 3

Co-authors

Stavros SimoglouPhD Candidate, Circuits and Systems Lab, University of Thessaly and Synopsys Inc.Verified email at uth.gr
Iordanis LilitsisUndergraduate Student, Circuits and Systems Lab, University of ThessalyVerified email at e-ce.uth.gr
Christos P SotiriouEECE Department, University of ThessalyVerified email at eece.uth.gr

Nikolaos Blias

Nikolaos Blias

PhD Candidate, Circuits and Systems Lab, University of Thessaly

Verified email at uth.gr

Electronic Design Automation Static Timing Analysis Computer Engineering


Title Sort by citations Sort by year Sort by title	Cited by Cited by	Year
Static timing analysis induced simulation errors for asynchronous circuits S Simoglou, C Sotiriou, N Blias 2021 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2021	3	2021
Timing errors in sta-based gate-level simulation S Simoglou, C Sotiriou, N Blias 2020 26th IEEE International Symposium on Asynchronous Circuits and Systems …, 2020	2	2020
Investigation on Performance, Power, Area Trade-Offs using Deterministic and Monte-Carlo Process Variation Aware Synthesis Flows N Blias, I Lilitsis, S Simoglou, E Bakas, C Sotiriou 2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration …, 2022	1	2022
Υλοποίηση στατικής χρονικής ανάλυσης δανεισμού χρόνου μανταλωτών, με ή χωρίς τομή κύκλων ΝΑ Μπλιας		2021

The system can't perform the operation now. Try again later.

Articles 1–4