| Comparison of accelerator coherency port (ACP) and high performance port (HP) for data transfer in DDR memory Using xilinx ZYNQ SoC RJ Nayak, JB Chavda Information and Communication Technology for Intelligent Systems (ICTIS 2017 …, 2018 | 7 | 2018 |
| A survey on various techniques of super resolution imaging R Macwan, N Patel, P Prajapati, J Chavda International Journal of Computer Applications 90 (1), 2014 | 6 | 2014 |
| Performance evaluation PL330 DMA controller for bulk data transfer in Zynq SoC A Choudhary, JB Chavda, AP Ganatra, RJ Nayak 2016 IEEE International Conference on Recent Trends in Electronics …, 2016 | 4 | 2016 |
| Design of Image Display Controller Component for VGA Interfaced Monitor using ZedBoard DA Thakar, RJ Nayak, JB Chavda, JR Patel, MP Patel 2nd International Conference on Current Research Trends in Engineering and …, 2018 | 2 | 2018 |
| Performance measure of image processing algorithms on DSP processor & FPGA based coprocessor J Chavda, P Tank, SN Pradhan, S Jain Proceedings of the 2010 International Conference on Advances in …, 2010 | 2 | 2010 |
| Survey on developing data acquisition system using ZYNQ architecture MP Patel, A Ganatra, RJ Nayak, JB Chavda 2017 International Conference on Intelligent Sustainable Systems (ICISS …, 2017 | 1 | 2017 |
| Refactoring Software Projects Using Object Oriented Concepts A Desai, J Chavda, A Ganatra, A Thakkar, Y Kosta Bangaluru: ICICCA, 2010 | 1 | 2010 |
| Proficient Design Space Exploration of ZYNQ SoC using VIVADO Design Suite: Custom Design of High Performance AXI Interface for High speed data transfer between PL and DDR … RJ Nayak, JB Chavda International Journal of Applied Engineering Research 13 (11), 8991-8997, 2018 | | 2018 |
Dr Swati JainAssociate Professor , Nirma UniversityVerified email at nirmauni.ac.in
Dr Swati JainAssociate Professor , Nirma UniversityVerified email at nirmauni.ac.in