| Best practices for compact modeling in Verilog-A CC McAndrew, GJ Coram, KK Gullapalli, JR Jones, LW Nagel, AS Roy, ... IEEE Journal of the Electron Devices Society 3 (5), 383-396, 2015 | 111 | 2015 |
| A scalable advanced RF IC design‐oriented MOSFET model M Bucher, A Bazigos, S Yoshitomi, N Itoh International Journal of RF and Microwave Computer‐Aided Engineering: Co …, 2008 | 21 | 2008 |
| Lateral bipolar transistor formed on an insulating layer T Yamada, H Nii, M Yoshimi, T Shino, K Inoh, S Kawanaka, T Fuse, ... US Patent 6,376,897, 2002 | 20 | 2002 |
| EKV3 parameter extraction and characterization of 90nm RF-CMOS technology S Yoshitomi, A Bazigos, M Bucher 2007 14th International Conference on Mixed Design of Integrated Circuits …, 2007 | 19 | 2007 |
| An 0.3-/spl mu/m Si epitaxial base BiCMOS technology with 37-GHz f/sub max/and 10-V BV/sub ceo/for RF telecommunication H Nii, C Yoshino, S Yoshitomi, K Inoh, H Furuya, H Nakajima, H Sugaya, ... IEEE Transactions on Electron Devices 46 (4), 712-721, 1999 | 14 | 1999 |
| A study of flicker noise suppression of K-band VCO using striped inductor H Tsuji, Y Itano, K Komoku, T Morishita, S Yoshitomi, N Itoh 2015 Asia-Pacific Microwave Conference (APMC) 3, 1-3, 2015 | 11 | 2015 |
| High-Q MOS-varactor modeling for mm-wave VCOs Y Itano, N Itoh, S Yoshitomi, H Hoshino 2012 Asia Pacific Microwave Conference Proceedings, 202-204, 2012 | 9 | 2012 |
| Analysis of harmonic distortion in deep submicron CMOS M Bucher, A Bazigos, N Nastos, Y Papananos, F Krummenacher, ... Proceedings of the 2004 11th IEEE International Conference on Electronics …, 2004 | 9 | 2004 |
| Analysis on high-frequency characteristics of SOI lateral BJTs with self-aligned external base for 2-GHz RF applications T Shino, S Yoshitomi, H Nii, S Kawanaka, K Inoh, T Yamada, T Fuse, ... IEEE Transactions on Electron Devices 49 (3), 414-421, 2002 | 9 | 2002 |
| Challenges of compact modeling for deep-submicron RF-CMOS devices S Yoshitomi 12th Int. Conf. Mixed Design (MIXDES 2005), 22-25, 2005 | 8 | 2005 |
| Benchmarking the EKV3. 0 MOSFET model in Verilog-A and 0. 14µm CMOS A Bazigos, M Bucher, S Yoshitomi Int. Conf. on Mixed Design (MIXDES 2004), 24-26, 2004 | 8 | 2004 |
| A study of striped inductor for K-and Ka-band voltage-controlled oscillators N Itoh, H Tsuji, Y Itano, T Morishita, K Komoku, S Yoshitomi IEICE Transactions on Electronics 99 (6), 614-622, 2016 | 7 | 2016 |
| Striped inductor for quasi millimeter wave voltage-controlled oscillator N Itoh, Y Itano, S Morimoto, S Yoshitomi 2013 Asia-Pacific Microwave Conference Proceedings (APMC), 319-321, 2013 | 7 | 2013 |
| Three-dimensional mechanical stress analysis of trench isolation along {111} gliding planes S Matsuda, C Yoshino, H Nakajima, K Inou, S Yoshitomi, Y Katsumata, ... Proceedings of 1994 IEEE International Electron Devices Meeting, 885-888, 1994 | 7 | 1994 |
| A study of current-reuse 800 MHz/1.9 GHz concurrent dual-band amplifier T Ogawa, T Morishita, K Komoku, Y Itano, S Yoshitomi, N Itoh 2016 IEEE Radio and Wireless Symposium (RWS), 245-247, 2016 | 6 | 2016 |
| High-Q MOS varactor models for Quasi-millimeter-wave low-noise LC-VCOs Y Itano, S Morimoto, S Yoshitomi, N Itoh IEICE Transactions on Fundamentals of Electronics, Communications and …, 2014 | 6 | 2014 |
| Analysis and simulation of spiral inductor fabricated on silicon substrate S Yoshitomi Proceedings of the 2004 11th IEEE International Conference on Electronics …, 2004 | 6 | 2004 |
| Foss ekv2. 6 verilog-a compact mosfet model W Grabinski, M Pavanello, M de Souza, D Tomaszewski, J Malesinska, ... ESSDERC 2019-49th European Solid-State Device Research Conference (ESSDERC …, 2019 | 5 | 2019 |
| Challenges to Accuracy for the Design of Deep-Submicron RF-CMOS Circuits S Yoshitomi 2007 Asia and South Pacific Design Automation Conference, 438-441, 2007 | 5 | 2007 |
| Method for manufacturing a lateral bipolar transistor T Shino, T Yamada, M Yoshimi, S Kawanaka, H Nii, K Inoh, T Fuse, ... US Patent 6,174,779, 2001 | 5 | 2001 |
