Richard Dorrance
Richard Dorrance
Research Scientist at Intel Labs
Verified email at intel.com
Title
Cited by
Cited by
Year
Voltage-induced switching of nanoscale magnetic tunnel junctions
JG Alzate, PK Amiri, P Upadhyaya, SS Cherepov, J Zhu, M Lewis, ...
2012 International Electron Devices Meeting, 29.5. 1-29.5. 4, 2012
942012
Scalability and design-space analysis of a 1T-1MTJ memory cell for STT-RAMs
R Dorrance, F Ren, Y Toriyama, AA Hafez, CKK Yang, D Markovic
IEEE Transactions on Electron Devices 59 (4), 878-887, 2012
882012
A scalable sparse matrix-vector multiplication kernel for energy-efficient sparse-blas on FPGAs
R Dorrance, F Ren, D Marković
Proceedings of the 2014 ACM/SIGDA international symposium on Field …, 2014
872014
Design of a fast and low-power sense amplifier and writing circuit for high-speed MRAM
H Lee, JG Alzate, R Dorrance, XQ Cai, D Marković, PK Amiri
IEEE Transactions on Magnetics 51 (5), 1-7, 2014
522014
Diode-MTJ crossbar memory cell using voltage-induced unipolar switching for high-density MRAM
R Dorrance, JG Alzate, SS Cherepov, P Upadhyaya, IN Krivorotov, ...
IEEE Electron Device Letters 34 (6), 753-755, 2013
492013
A body-voltage-sensing-based short pulse reading circuit for spin-torque transfer RAMs (STT-RAMs)
F Ren, H Park, R Dorrance, Y Toriyama, CKK Yang, D Marković
Thirteenth International Symposium on Quality Electronic Design (ISQED), 275-282, 2012
422012
A single-precision compressive sensing signal reconstruction engine on FPGAs
F Ren, R Dorrance, W Xu, D Markovic
Field Programmable Logic and Applications (FPL), 2013 23rd International …, 2013
352013
A cm-scale self-powered intelligent and secure IoT edge mote featuring an ultra-low-power SoC in 14nm tri-gate CMOS
T Karnik, D Kurian, P Aseron, R Dorrance, E Alpman, A Nicoara, R Popov, ...
2018 IEEE International Solid-State Circuits Conference-(ISSCC), 46-48, 2018
342018
Nonvolatile magneto-electric random access memory circuit with burst writing and back-to-back reads
PK Amiri, R Dorrance, D Markovic, KL Wang
US Patent 8,988,923, 2015
252015
Modeling and Design of STT-MRAMs
RW Dorrance
MS Thesis, 2011
25*2011
Read-disturbance-free nonvolatile content addressable memory (CAM)
PK Amiri, R Dorrance, D Markovic, KL Wang
US Patent 9,047,950, 2015
172015
802.11 g/n compliant fully integrated wake-up receiver with− 72-dBm sensitivity in 14-nm FinFET CMOS
E Alpman, A Khairi, R Dorrance, M Park, VS Somayazulu, JR Foerster, ...
IEEE Journal of Solid-State Circuits 53 (5), 1411-1422, 2018
132018
Scalability and design-space analysis of a 1T-1MTJ memory cell
R Dorrance, F Ren, Y Toriyama, A Amin, CKK Yang, D Marković
2011 IEEE/ACM International Symposium on Nanoscale Architectures, 32-36, 2011
102011
Analysis of STT-RAM cell design with multiple MTJs per access
H Park, R Dorrance, A Amin, F Ren, D Marković, CKK Yang
2011 IEEE/ACM International Symposium on Nanoscale Architectures, 53-58, 2011
82011
An 802.11ba 495μW -92.6dBm-Sensitivity Blocker-Tolerant Wake-up Radio Receiver Fully Integrated with Wi-Fi Transceiver
R Liu, AB KT, R Dorrance, D Dasalukunte, MAS Lopez, V Kristem, S Azizi, ...
2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 255-258, 2019
52019
Wake up radio device, circuit configuration, and method
R Dorrance, M Park, AW Min, F Sheikh
US Patent 9,967,820, 2018
52018
A 190gflops/w dsp for energy-efficient sparse-blas in embedded iot
R Dorrance, D Markovic
2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits), 1-2, 2016
52016
An ultra-low power, fully integrated wake-up receiver and digital baseband with all-digital impairment correction and-92.4 dBm sensitivity for 802.11 ba
R Dorrance, R Liu, KTA Beevi, D Dasalukunte, MAS Lopez, V Kristem, ...
2019 Symposium on VLSI Circuits, C80-C81, 2019
22019
A Digital Root Based Modular Reduction Technique for Power Efficient, Fault Tolerance in FPGAs
R Dorrance, A Belogolovy, H Wang, X Zhang
2020 30th International Conference on Field-Programmable Logic and …, 2020
2020
Devices and methods for updating maps in autonomous driving systems in bandwidth constrained networks
R Dorrance, I Alvarez, D Dasalukunte, SMI Alam, S Sharma, K Sivanesan, ...
US Patent App. 16/828,986, 2020
2020
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