Uday Reddy Bondhugula
Uday Reddy Bondhugula
Indian Institute of Science and PolyMage Labs
Verified email at iisc.ac.in - Homepage
Title
Cited by
Cited by
Year
A practical automatic polyhedral parallelizer and locality optimizer
U Bondhugula, A Hartono, J Ramanujam, P Sadayappan
ACM SIGPLAN conference on Programming Languages Design and Implementation 43 …, 2008
1187*2008
Automatic transformations for communication-minimized parallelization and locality optimization in the polyhedral model
U Bondhugula, M Baskaran, S Krishnamoorthy, J Ramanujam, A Rountev, ...
International Conference on Compiler Construction, 132-146, 2008
2952008
A compiler framework for optimization of affine loop nests for GPGPUs
MM Baskaran, U Bondhugula, S Krishnamoorthy, J Ramanujam, ...
Proceedings of the 22nd annual international conference on Supercomputing …, 2008
2702008
Effective automatic parallelization of stencil computations
S Krishnamoorthy, M Baskaran, U Bondhugula, J Ramanujam, A Rountev, ...
ACM SIGPLAN conference on Programming Language Design and Implementation …, 2007
2622007
Tiling stencil computations to maximize parallelism
V Bandishti, I Pananilath, U Bondhugula
SC'12: Proceedings of the International Conference on High Performance …, 2012
2082012
Polymage: Automatic optimization for image processing pipelines
RT Mullapudi, V Vasista, U Bondhugula
International conference on Architectural Support for Programming Languages …, 2015
1582015
Automatic data movement and computation mapping for multi-level parallel architectures with explicitly managed memories
MM Baskaran, U Bondhugula, S Krishnamoorthy, J Ramanujam, ...
Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of …, 2008
1582008
Loop transformations: convexity, pruning and optimization
LN Pouchet, U Bondhugula, C Bastoul, A Cohen, J Ramanujam, ...
ACM SIGPLAN Notices 46 (1), 549-562, 2011
1462011
Combined iterative and model-driven optimization in an automatic parallelization framework
LN Pouchet, U Bondhugula, C Bastoul, A Cohen, J Ramanujam, ...
SC'10: Proceedings of the 2010 ACM/IEEE International Conference for High …, 2010
116*2010
Compiling affine loop nests for distributed-memory parallel architectures
U Bondhugula
SC'13: Proceedings of the International Conference on High Performance …, 2013
101*2013
Data layout transformation for enhancing data locality on NUCA chip multiprocessors
Q Lu, C Alias, U Bondhugula, T Henretty, S Krishnamoorthy, ...
Parallel Architectures and Compilation Techniques, 2009. PACT'09. 18th …, 2009
952009
Effective automatic parallelization and locality optimization using the polyhedral model
UK Bondhugula
The Ohio State University, 2008
932008
Parallel FPGA-based all-pairs shortest-paths in a directed graph
U Bondhugula, A Devulapalli, J Fernando, P Wyckoff, P Sadayappan
Proceedings 20th IEEE International Parallel & Distributed Processing …, 2006
832006
A model for fusion and code motion in an automatic parallelizing compiler
U Bondhugula, S Dash, O Gunluk, L Renganarayanan
2010 19th International Conference on Parallel Architectures and Compilation …, 2010
762010
Compiler-assisted dynamic scheduling for effective parallelization of loop nests on multicore processors
MM Baskaran, N Vydyanathan, UKR Bondhugula, J Ramanujam, ...
ACM sigplan notices 44 (4), 219-228, 2009
742009
MLIR: A Compiler Infrastructure for the End of Moore's Law
C Lattner, M Amini, U Bondhugula, A Cohen, A Davis, J Pienaar, R Riddle, ...
arXiv preprint arXiv:2002.11054, 2020
662020
Pluto: A practical and fully automatic polyhedral parallelizer and locality optimizer
U Bondhugula, J Ramanujam, P Sadayappan
The Ohio State University, 2007
542007
Generating efficient data movement code for heterogeneous architectures with distributed-memory
R Dathathri, C Reddy, T Ramashekar, U Bondhugula
Proceedings of the 22nd international conference on Parallel architectures …, 2013
512013
High performance RDMA based all-to-all broadcast for Infiniband clusters
S Sur, UKR Bondhugula, A Mamidala, HW Jin, DK Panda
International Conference on High-Performance Computing, 148-157, 2005
472005
Believe it or not! mult-core CPUs can match GPU performance for a FLOP-intensive application!
R Bordawekar, U Bondhugula, R Rao
Proceedings of the 19th international conference on Parallel architectures …, 2010
452010
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Articles 1–20