Efficient aggregation for graph summarization Y Tian, RA Hankins, JM Patel Proceedings of the 2008 ACM SIGMOD international conference on Management of …, 2008 | 596 | 2008 |
Error resilient system architecture (ERSA) for probabilistic applications J Bau, R Hankins, Q Jacobson, S Mitra, B Saha, AR Adl-Tabatabai IEEE Workshop on Silicon Errors in Logic-System Effects, SELSE, 2007 | 452* | 2007 |
Data morphing: An adaptive, cache-conscious storage technique RA Hankins, JM Patel Proceedings 2003 VLDB Conference, 417-428, 2003 | 176 | 2003 |
Practical suffix tree construction S Tata, RA Hankins, JM Patel VLDB 4, 36-47, 2004 | 125 | 2004 |
Practical methods for constructing suffix trees Y Tian, S Tata, RA Hankins, JM Patel The VLDB Journal 14, 281-299, 2005 | 124 | 2005 |
Effect of node size on the performance of cache-conscious B+-trees RA Hankins, JM Patel Proceedings of the 2003 ACM SIGMETRICS international conference on …, 2003 | 121 | 2003 |
Mechanism for instruction set based thread execution on a plurality of instruction sequencers H Wang, J Shen, E Grochowski, JP Held, B Bigbee, SD Kaushik, ... US Patent 8,719,819, 2014 | 115 | 2014 |
Method and apparatus for incrementally determining location context Y Ma, R Hankins, D Racz US Patent 8,737,961, 2014 | 110 | 2014 |
The fuzzy correlation between code and performance predictability M Annavaram, R Rakvic, M Polito, JY Bouguet, R Hankins, B Davies 37th International Symposium on Microarchitecture (MICRO-37'04), 93-104, 2004 | 89 | 2004 |
Mechanism for monitoring instruction set based thread execution on a plurality of instruction sequencers RA Hankins, GN Chinya, H Wang, SD Kaushik, BE Bigbee, JP Shen, ... US Patent 8,010,969, 2011 | 85 | 2011 |
Scaling and characterizing database workloads: Bridging the gap between research and practice R Hankins, T Diep, M Annavaram, B Hirano, H Eri, H Nueckel, JP Shen Proceedings. 36th Annual IEEE/ACM International Symposium on …, 2003 | 83 | 2003 |
Load balancing for multi-threaded applications via asymmetric power throttling R Rakvic, RA Hankins, E Grochowski, H Wang, M Annavaram, ... US Patent 8,108,863, 2012 | 56 | 2012 |
Scheduling optimizations for user-level threads R Rakvic, R Hankins, H Wang, T Diep, X Tain, P Petersen, S Shah, ... US Patent App. 11/235,865, 2007 | 54 | 2007 |
Mechanism to emulate user-level multithreading on an OS-sequestered sequencer GN Chinya, H Wang, X Zou, JP Held, P Sethi, T Diep, A Aggarwal, ... US Patent 7,810,083, 2010 | 51 | 2010 |
Instruction set architecture-based inter-sequencer communications with a heterogeneous resource H Wang, J Shen, H Jiang, R Hankins, P Hammarlund, D Rodgers, ... US Patent 8,914,618, 2014 | 50 | 2014 |
Mechanism to schedule threads on OS-sequestered sequencers without operating system intervention RA Hankins, H Wang, GN Chinya, TA Diep, SD Kaushik, BE Bigbee, ... US Patent 8,607,235, 2013 | 48 | 2013 |
Multiple instruction stream processor RA Hankins, GN Chinya, JD Collins, PH Wang, R Rakvic, H Wang, ... ACM SIGARCH Computer Architecture News 34 (2), 114-127, 2006 | 47 | 2006 |
Sequencer address management H Wang, GN Chinya, RA Hankins, SD Kaushik, B Bigbee, J Shen, ... US Patent 7,743,233, 2010 | 35 | 2010 |
Structured exception handling for application-managed thread units RA Hankins, GN Chinya, H Wang, DK Poulsen, S Aundhe, BV Patel, ... US Patent 8,689,215, 2014 | 33 | 2014 |
Method, system, and program of a compiler to parallelize source code GD Ottoni, X Tian, H Wang, RA Hankins, W Li, J Shen US Patent 7,882,498, 2011 | 32 | 2011 |