Sally A. McKee
Sally A. McKee
C. Tycho Howle Chair at Clemson University Electrical and Computer Engineering
Verified email at - Homepage
Cited by
Cited by
Hitting the memory wall: Implications of the obvious
WA Wulf, SA McKee
ACM SIGARCH computer architecture news 23 (1), 20-24, 1995
Reflections on the memory wall
SA McKee
Proceedings of the 1st conference on Computing frontiers, 162, 2004
Efficiently exploring architectural design spaces via predictive modeling
E Ipek, SA McKee, R Caruana, BR de Supinski, M Schulz
ACM SIGOPS Operating Systems Review 40 (5), 195-206, 2006
Real time power estimation and thread scheduling via performance counters
K Singh, M Bhadauria, SA McKee
ACM SIGARCH Computer Architecture News 37 (2), 46-55, 2009
Methods of inference and learning for performance modeling of parallel applications
BC Lee, DM Brooks, BR de Supinski, M Schulz, K Singh, SA McKee
Proceedings of the 12th ACM SIGPLAN symposium on Principles and practice of …, 2007
An approach to performance prediction for parallel applications
E Ipek, BR de Supinski, M Schulz, SA McKee
Euro-Par 2005 Parallel Processing, 627-628, 2005
The impulse memory controller
L Zhang, Z Fang, M Parker, BK Mathew, L Schaelicke, JB Carter, ...
IEEE Transactions on Computers 50 (11), 1117-1132, 2001
An approach to resource-aware co-scheduling for CMPs
M Bhadauria, SA McKee
Proceedings of the 24th ACM International Conference on Supercomputing, 189-199, 2010
Method and device for maximizing memory system bandwidth by accessing data in a dynamically determined order
WA Wulf, SA McKee, R Klenke, AJ Schwab, SA Moyer, J Aylor, ...
US Patent 6,154,826, 2000
Dynamic access ordering for streamed computations
SA McKee, WA Wulf, JH Aylor, RH Klenke, MH Salinas, SI Hong, ...
IEEE Transactions on Computers 49 (11), 1255-1271, 2000
Portable, scalable, per-core power estimation for intelligent resource management
B Goel, S McKee, R Gioiosa, K Singh, M Bhadauria, M Cesati
Green Computing Conference, 2010 International, 135-146, 2010
Access ordering and memory-conscious cache utilization
SA McKee, WA Wulf
Proceedings of 1995 1st IEEE Symposium on High Performance Computer …, 1995
Can hardware performance counters be trusted?
VM Weaver, SA McKee
2008 IEEE International Symposium on Workload Characterization, 141-150, 2008
Understanding PARSEC performance on contemporary CMPs
M Bhadauria, VM Weaver, SA McKee
2009 IEEE International Symposium on Workload Characterization (IISWC), 98-107, 2009
Compiler-enhanced incremental checkpointing for OpenMP applications
G Bronevetsky, D Marques, K Pingali, SA McKee, R Rugina
Parallel & Distributed Processing, 2009. IPDPS 2009. IEEE International …, 2009
Access order and effective bandwidth for streams on a direct rambus memory
SI Hong, SA McKee, MH Salinas, RH Klenke, JH Aylor, WA Wulf
Proceedings Fifth International Symposium on High-Performance Computer …, 1999
Characterizing and subsetting big data workloads
Z Jia, J Zhan, L Wang, R Han, SA McKee, Q Yang, C Luo, J Li
2014 IEEE International Symposium on Workload Characterization (IISWC), 191-201, 2014
Design of a parallel vector access unit for SDRAM memory systems
BK Mathew, SA McKee, JB Carter, A Davis
Proceedings Sixth International Symposium on High-Performance Computer …, 2000
Efficient architectural design space exploration via predictive modeling
E Ipek, SA McKee, K Singh, R Caruana, BR Supinski, M Schulz
ACM Transactions on Architecture and Code Optimization (TACO) 4 (4), 1-34, 2008
Predicting parallel application performance via machine learning approaches
K Singh, E Ipek, SA McKee, BR de Supinski, M Schulz, R Caruana
Concurrency and Computation: Practice and Experience 19 (17), 2219-2235, 2007
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