| A practical introduction to PSL C Eisner, D Fisman Springer Science & Business Media, 2007 | 312 | 2007 |
| Reasoning with temporal logic on truncated paths C Eisner, D Fisman, J Havlicek, Y Lustig, A McIsaac, D Van Campenhout Computer Aided Verification: 15th International Conference, CAV 2003 …, 2003 | 272 | 2003 |
| The temporal logic Sugar I Beer, S Ben-David, C Eisner, D Fisman, A Gringauze, Y Rodeh Computer Aided Verification: 13th International Conference, CAV 2001 Paris …, 2001 | 217 | 2001 |
| RuleBase: An industry-oriented formal verification tool I Beer, S Ben-David, C Eisner, A Landver Proceedings of the 33rd annual Design Automation Conference, 655-660, 1996 | 217 | 1996 |
| Efficient detection of vacuity in ACTL formulas I Beer, S Ben-David, C Eisner, Y Rodeh Computer Aided Verification: 9th International Conference, CAV'97 Haifa …, 1997 | 173 | 1997 |
| Efficient detection of vacuity in temporal model checking I Beer, S Ben-David, C Eisner, Y Rodeh Formal Methods in System Design 18, 141-163, 2001 | 130 | 2001 |
| RuleBase: Model checking at IBM I Beer, S Ben-David, C Eisner, D Geist, L Gluhovsky, T Heyman, ... Computer Aided Verification: 9th International Conference, CAV'97 Haifa …, 1997 | 66 | 1997 |
| Comparing symbolic and explicit model checking of a software system C Eisner, D Peled International SPIN Workshop on Model Checking of Software, 230-239, 2002 | 58 | 2002 |
| Model checking at IBM S Ben-David, C Eisner, D Geist, Y Wolfsthal Formal Methods in System Design 22, 101-108, 2003 | 55 | 2003 |
| Using symbolic model checking to verify the railway stations of Hoorn-Kersenboogerd and Heerhugowaard C Eisner Correct Hardware Design and Verification Methods: 10th IFIP WG10. 5 Advanced …, 1999 | 40 | 1999 |
| The definition of a temporal clock operator C Eisner, D Fisman, J Havlicek, A McIsaac, D Van Campenhout International Colloquium on Automata, Languages, and Programming, 857-870, 2003 | 38 | 2003 |
| Resurrecting infeasible clock-gating functions E Arbel, C Eisner, O Rokhlenko Proceedings of the 46th Annual Design Automation Conference, 160-165, 2009 | 37 | 2009 |
| A topological characterization of weakness C Eisner, D Fisman, J Havlicek Proceedings of the twenty-fourth annual ACM symposium on Principles of …, 2005 | 29 | 2005 |
| Automatic abstraction of software source I Beer, C Eisner US Patent 7,146,605, 2006 | 28 | 2006 |
| On the effective deployment of functional formal verification Y Abarbanel-Vinov, N Aizenbud-Reshef, I Beer, C Eisner, D Geist, ... Formal Methods in System Design 19, 35-44, 2001 | 22 | 2001 |
| Augmenting a regular expression-based temporal logic with local variables C Eisner, D Fisman 2008 Formal Methods in Computer-Aided Design, 1-8, 2008 | 20 | 2008 |
| A methodology for formal design of hardware control with application to cache coherence protocols C Eisner, I Shitsevalov, R Hoover, W Nation, K Nelson, K Valk Proceedings of the 37th Annual Design Automation Conference, 724-729, 2000 | 20 | 2000 |
| Accurate malware detection by extreme abstraction F Copty, M Danos, O Edelstein, C Eisner, D Murik, B Zeltser Proceedings of the 34th Annual Computer Security Applications Conference …, 2018 | 18 | 2018 |
| Formal verification of software source code through semi-automatic modeling C Eisner Software & Systems Modeling 4, 14-31, 2005 | 18 | 2005 |
| Basic results on the semantics of Accellera PSL 1.1 foundation language J Havlicek, D Fisman, C Eisner Technical Report 2004.02, Accellera, 2004 | 17 | 2004 |
