| A built-in self-repair design for RAMs with 2-D redundancy JF Li, JC Yeh, RF Huang, CW Wu IEEE Transactions on Very Large Scale Integration (VLSI) Systems 13 (6), 742-745, 2005 | 134 | 2005 |
| A built-in self-repair scheme for semiconductor memories with 2-D redundancy JF Li, JC Yeh, RF Huang, CW Wu, PY Tsai, A Hsu, E Chow International Test Conference, 2003. Proceedings. ITC 2003., 393-393, 2003 | 91 | 2003 |
| E-fuse apparatus for controlling reference voltage required for programming/reading e-fuse macro in an integrated circuit via switch device in the same integrated circuit CH Liu, RF Huang, CC Chen, CY Jao US Patent 8,050,129, 2011 | 65 | 2011 |
| A simulator for evaluating redundancy analysis algorithms of repairable embedded memories RF Huang, JF Li, JC Yeh, CW Wu Proceedings of the 2002 IEEE International Workshop on Memory Technology …, 2002 | 60 | 2002 |
| A processor-based built-in self-repair design for embedded memories CL Su, RF Huang, CW Wu 2003 Test Symposium, 366-371, 2003 | 51 | 2003 |
| Method and apparatus of build-in self-diagnosis and repair in a memory with syndrome identification CW Wu, RF Huang, CL Su, WC Wu, YJ Chang, KL Luo, ST Lin US Patent 7,228,468, 2007 | 48 | 2007 |
| Economic aspects of memory built-in self-repair RF Huang, CH Chen, CW Wu IEEE Design & Test of Computers 24 (2), 164-172, 2007 | 41 | 2007 |
| MRAM defect analysis and fault modeling CL Su, RF Huang, CW Wu, CC Hung, MJ Kao, YJ Chang, WC Wu 2004 International Conferce on Test, 124-133, 2004 | 39 | 2004 |
| Raisin: Redundancy analysis algorithm simulation RF Huang, JC Yeh, JF Li, CW Wu IEEE Design & Test of Computers 24 (4), 386-396, 2007 | 37 | 2007 |
| Testing methodology of embedded DRAMs HY Yang, CM Chang, MCT Chao, RF Huang, SC Lin IEEE transactions on very large scale integration (VLSI) systems 20 (9 …, 2011 | 27 | 2011 |
| Alternate hammering test for application-specific DRAMs and an industrial case study RF Huang, HY Yang, MCT Chao, SC Lin Proceedings of the 49th Annual Design Automation Conference, 1012-1017, 2012 | 25 | 2012 |
| Defect oriented fault analysis for SRAM RF Huang, YF Chou, CW Wu 2003 Test Symposium, 256-261, 2003 | 24 | 2003 |
| Fault models and test methods for subthreshold SRAMs CW Lin, HH Chen, HY Yang, MCT Chao, RF Huang Test Conference (ITC), 2010 IEEE International, 1-10, 2010 | 22 | 2010 |
| Fault models for embedded-DRAM macros MCT Chao, HY Yang, RF Huang, SC Lin, CY Chin Proceedings of the 46th Annual Design Automation Conference, 714-719, 2009 | 18 | 2009 |
| Wide operation margin of toggle mode switching for magnetic random access memory with preceding negative pulse writing scheme CC Hung, YJ Lee, MJ Kao, YH Wang, RF Huang, WC Chen, YS Chen, ... Applied physics letters 88 (11), 2006 | 15 | 2006 |
| A built-in self-diagnosis and repair design with fail pattern identification for memories CL Su, RF Huang, CW Wu, KL Luo, WC Wu IEEE transactions on very large scale integration (VLSI) systems 19 (12 …, 2010 | 13 | 2010 |
| On test and diagnostics of flash memories CT Huang, JC Yeh, YY Shih, RF Huang, CW Wu 13th Asian Test Symposium, 260-265, 2004 | 13 | 2004 |
| Method and apparatus of build-in self-diagnosis and repair in a memory with syndrome identification CW Wu, RF Huang, CL Su, WC Wu, KL Luo US Patent 7,644,323, 2010 | 12 | 2010 |
| RAISIN: A tool for evaluating redundancy analysis schemes in reparable embedded memories RF Huang IEEE Des. Test Comput. 24 (4), 386-396, 2007 | 11 | 2007 |
| A memory built-in self-diagnosis design with syndrome compression RF Huang, CL Su, CW Wu, YJ Chang, WC Wu Proceedings. 2004 IEEE International Workshop on Current and Defect Based …, 2004 | 10 | 2004 |
Jen-Chieh (J.-C.) YehR&D, QualcommVerified email at larc.ee.nthu.edu.tw
