| Unexpected mobility degradation for very short devices: A new challenge for CMOS scaling A Cros, K Romanjek, D Fleury, S Harrison, R Cerutti, P Coronel, ... 2006 International Electron Devices Meeting, 1-4, 2006 | 147 | 2006 |
| 50 nm-gate all around (GAA)-silicon on nothing (SON)-devices: A simple way to co-integration of GAA transistors within bulk MOSFET process S Monfray, T Skotnicki, Y Morand, S Descombes, P Coronel, P Mazoyer, ... 2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No …, 2002 | 109 | 2002 |
| Quantum short-channel compact modelling of drain-current in double-gate MOSFET D Munteanu, JL Autran, X Loussier, S Harrison, R Cerutti, T Skotnicki Solid-State Electronics 50 (4), 680-686, 2006 | 105 | 2006 |
| NanoSolveIT Project: Driving nanoinformatics research to develop innovative and integrated tools for in silico nanosafety assessment A Afantitis, G Melagraki, P Isigonis, A Tsoumanis, DD Varsou, ... Computational and Structural Biotechnology Journal 18, 583-602, 2020 | 96 | 2020 |
| M&NEMS: A new approach for ultra-low cost 3D inertial sensor P Robert, V Nguyen, S Hentz, L Duraffourg, G Jourdan, J Arcamone, ... SENSORS, 2009 IEEE, 963-966, 2009 | 93 | 2009 |
| Key principles and operational practices for improved nanotechnology environmental exposure assessment C Svendsen, LA Walker, M Matzke, E Lahive, S Harrison, A Crossley, ... Nature nanotechnology 15 (9), 731-742, 2020 | 90 | 2020 |
| Highly performant double gate MOSFET realized with SON process S Harrison, P Coronel, F Leverd, R Cerutti, R Palla, D Delille, S Borel, ... IEEE International Electron Devices Meeting 2003, 18.6. 1-18.6. 4, 2003 | 66 | 2003 |
| Isotropic etching of SiGe alloys with high selectivity to similar materials S Borel, C Arvet, J Bilde, S Harrison, D Louis Microelectronic engineering 73, 301-305, 2004 | 57 | 2004 |
| Quantum short-channel compact model for the threshold voltage in double-gate MOSFETs with high-permittivitty gate dielectrics D Munteanu, JL Autran, S Harrison Journal of Non-Crystalline Solids 351 (21-23), 1911-1918, 2005 | 41 | 2005 |
| A cost-effective low power platform for the 45-nm technology node E Josse, S Parihar, O Callen, P Ferreira, C Monget, A Farcy, M Zaleski, ... 2006 International Electron Devices Meeting, 1-4, 2006 | 38 | 2006 |
| Compact model of the quantum short-channel threshold voltage in symmetric Double-Gate MOSFET D Munteanu, JL Autran, S Harrison, K Nehari, O Tintori, T Skotnicki Molecular simulation 31 (12), 831-837, 2005 | 38 | 2005 |
| Analysis of edge losses on silicon heterojunction half solar cells F Gérenton, J Eymard, S Harrison, R Clerc, D Munoz Solar Energy Materials and Solar Cells 204, 110213, 2020 | 31 | 2020 |
| Back contact heterojunction solar cells patterned by laser ablation S Harrison, O Nos, G D’Alonzo, C Denis, A Coll, D Munoz Energy Procedia 92, 730-737, 2016 | 29 | 2016 |
| Glastir monitoring & evaluation programme BA Emmett, M Abdalla, S Anthony, S Astbury, T August, G Barrett, ... Final Report to Welsh Government (Contract reference: C147/2010/11. NERC …, 2017 | 28 | 2017 |
| Electrical characterization and modelling of high-performance SON DG MOSFETs S Harrison, D Munteanu, U Autran, A Cros, R Cerutti, T Skotnicki Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat …, 2004 | 28 | 2004 |
| Evaluating environmental risk assessment models for nanomaterials according to requirements along the product innovation Stage-Gate process SN Sørensen, A Baun, M Burkard, M Dal Maso, SF Hansen, S Harrison, ... Environmental Science: Nano 6 (2), 505-518, 2019 | 27 | 2019 |
| Poly-gate replacement through contact hole (PRETCH): A new method for high-K/metal gate and multi-oxide implementation on chip S Harrison, P Coronel, A Cros, R Cerutti, F Leverd, A Beverina, ... IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004 …, 2004 | 23 | 2004 |
| New extraction method for gate bias dependent series resistance in nanometric double gate transistors A Cros, S Harrison, R Cerutti, P Coronel, G Ghibaudo, H Brut Proceedings of the 2005 International Conference on Microelectronic Test …, 2005 | 20 | 2005 |
| Silicon heterojunction solar cells with open-circuit-voltage above 750mV A Danel, S Harrison, F Gérenton, A Moustafa, R Varache, J Veirman, ... Proc. of the 35th European Photovoltaic Solar Energy Conference and …, 2018 | 18 | 2018 |
| Towards high efficiency on full wafer a-Si:H/c-Si heterojunction solar cells: 19.6% on 148cm2 D Muñoz, AS Ozanne, S Harrison, A Danel, F Souche, C Denis, A Favier, ... 2010 35th IEEE Photovoltaic Specialists Conference, 000039-000043, 2010 | 17 | 2010 |
