Ioannis Tsiokanos
Ioannis Tsiokanos
Verified email at qub.ac.uk
Title
Cited by
Cited by
Year
Low-power variation-aware cores based on dynamic data-dependent bitwidth truncation
I Tsiokanos, L Mukhanov, G Karakonstantis
2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 698-703, 2019
42019
Significance-driven data truncation for preventing timing failures
I Tsiokanos, L Mukhanov, DS Nikolopoulos, G Karakonstantis
IEEE Transactions on Device and Materials Reliability 19 (1), 25-36, 2019
42019
Variation-aware pipelined cores through path shaping and dynamic cycle adjustment: Case study on a floating-point unit
I Tsiokanos, L Mukhanov, DS Nikolopoulos, G Karakonstantis
Proceedings of the International Symposium on Low Power Electronics and …, 2018
42018
Minimization of timing failures in pipelined designs via path shaping and operand truncation
I Tsiokanos, L Mukhanov, DS Nikolopoulos, G Karakonstantis
2018 IEEE 24th International Symposium on On-Line Testing And Robust System …, 2018
32018
Accurate Estimation of Dynamic Timing Slacks using Event-Driven Simulation
D Garyfallou, I Tsiokanos, N Evmorfopoulos, G Stamoulis, ...
2020 21st International Symposium on Quality Electronic Design (ISQED), 225-230, 2020
12020
Cross-layer instruction-aware timing error mitigation & evaluation for energy-efficient dependable architectures
I Tsiokanos
Queen's University Belfast, 2021
2021
ExHero: Execution History-aware Error-rate Estimation in Pipelined Designs
I Tsiokanos, G Karakonstantis
IEEE Micro, 2020
2020
DEFCON: generating and detecting failure-prone instruction sequences via stochastic search
I Tsiokanos, L Mukhanov, G Georgakoudis, DS Nikolopoulos, ...
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2020
2020
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