| Trustore: Side-channel resistant storage for sgx using intel hybrid cpu-fpga H Oh, A Ahmad, S Park, B Lee, Y Paek Proceedings of the 2020 ACM SIGSAC Conference on Computer and Communications …, 2020 | 28 | 2020 |
| MeetGo: A trusted execution environment for remote applications on FPGA H Oh, K Nam, S Jeon, Y Cho, Y Paek IEEE Access 9, 51313-51324, 2021 | 27 | 2021 |
| Accelerating n-bit operations over TFHE on commodity CPU-FPGA K Nam, H Oh, H Moon, Y Paek Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided …, 2022 | 12 | 2022 |
| Actimon: Unified JOP and ROP detection with active function lists on an SoC FPGA H Oh, M Yang, Y Cho, Y Paek IEEE Access 7, 186517-186528, 2019 | 7 | 2019 |
| Parallel interleaving apparatus and method DH Kim, Y Kim, CW You, HY Song, DS Kim, HY Oh US Patent App. 11/983,106, 2008 | 6 | 2008 |
| Online wallet device and method for creating and verifying same YH Paek, HY OH US Patent App. 17/259,350, 2021 | 5 | 2021 |
| A metadata-driven approach to efficiently detect code-reuse attacks on ARM multiprocessors H Oh, Y Cho, Y Paek The Journal of Supercomputing 77 (7), 7287-7314, 2021 | 3 | 2021 |
| Collision-free interleaver composed of a latin square for parallel-architecture turbo codes DS Kim, HY Oh, HY Song IEEE communications letters 12 (3), 203-205, 2008 | 3 | 2008 |
| Collision-free Interleavers using Latin squares for parallel decoding of turbo codes HY Oh, DS Kim, JS Kim, HY Song 2007 IEEE 65th Vehicular Technology Conference-VTC2007-Spring, 1589-1592, 2007 | 2 | 2007 |
| Area-Efficient Accelerator for the Full NTRU-KEM Algorithm Y Lee, K Nam, Y Joo, J Kim, H Oh, Y Paek International Conference on Computational Science and Its Applications, 186-201, 2023 | 1 | 2023 |
| Real-time anomalous branch behavior inference with a GPU-inspired engine for machine learning models H Oh, H Yi, H Choe, Y Cho, S Yoon, Y Paek 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 908-913, 2019 | 1 | 2019 |
| Design of a Generic Security Interface for RISC-V Processors and its Applications H Oh, J Park, M Yang, D Hwang, Y Paek 2018 International SoC Design Conference (ISOCC), 40-41, 2018 | 1 | 2018 |
| Building Hardware Components for Memory Protection of Applications on a Tiny Processor H Oh, Y Lee, J Park, M Yang, Y Paek | 1 | 2017 |
| An Efficient Hardware/Software Co-design for FALCON on Low-End Embedded Systems Y Lee, J Youn, K Nam, HH Jung, M Cho, J Na, JY Park, S Jeon, BG Kang, ... IEEE Access, 2024 | | 2024 |
| Optimizing Hardware Resource Utilization for Accelerating the NTRU-KEM Algorithm Y Lee, J Youn, K Nam, H Oh, Y Paek Computers 12 (12), 259, 2023 | | 2023 |
| XtenStore: fast shielded in-memory key-value store on a hybrid x86-FPGA system H Oh, D Hwang, M Malenko, M Cho, H Moon, M Baunach, Y Paek 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 560-563, 2022 | | 2022 |
| XTENSTORE: Fast Shielded In-memory Key-Value Store on a Hybrid x86-FPGA System M Malenko, MC Baunach, H Oh, D Hwang, M Cho, Y Paek, H Moon Design, Automation and Test in Europe Conference 2022, 2022 | | 2022 |
| Testing and Deploying Security Algorithms on FPGA 오현영 서울대학교 대학원, 2022 | | 2022 |
| A Survey on Hardware Monitoring Technique for Security HJ Kim, MH Cho, JW Chang, H Oh, YH Paek Proceedings of the Korea Information Processing Society Conference, 283-285, 2020 | | 2020 |
| Collision-free Interleaver Composed of a Latin Square Matrix for Parallel-architecture Turbo Codes DS Kim, HY Oh, HY Song The Journal of Korean Institute of Communications and Information Sciences …, 2008 | | 2008 |
