| Robustness study and CNFET realization of optimal logic circuit for ultralow power applications P Gupta, A Islam 2014 International Conference on Signal Processing and Integrated Networks …, 2014 | 4 | 2014 |
| Design of Reversible Number Generator using Finite State Automation Realization V Kumar, P Gupta, SK Ranu, MK Pandey, A Islam Indian Journal of Science and Technology 9 (44), 2016 | | 2016 |
| A New Robust and Reliable Sub-threshold XOR Circuit with Full Output Swing V Kumar, MK Pandey, SK Ranu, P Gupta, A Islam Indian Journal of Science and Technology 9 (44), 2016 | | 2016 |
| Hybrid CMOS-SET Inverter Design for Improved Performance using Tied Body-backgate Technique P Gupta, SK Ranu, MK Pandey, A Islam Journal of VLSI Design Tools & Technology 5 (1), 24-29, 2015 | | 2015 |
