Chia-Lin Yang
Chia-Lin Yang
Professor of Computer Science and Information Engineering, National Taiwan University
Η διεύθυνση ηλεκτρονικού ταχυδρομείου έχει επαληθευτεί στον τομέα
Παρατίθεται από
Παρατίθεται από
BioRoute: A network-flow-based routing algorithm for the synthesis of digital microfluidic biochips
PH Yuh, CL Yang, YW Chang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2008
Bioroute: A Network-Flow Based Routing Algorithm for Digital Microfluidic Biochips
PH Yuh, CL Yang, YW Chang
International Conference on Computer-Aided Design, 2007
Optimizing NAND flash-based SSDs via retention relaxation
RS Liu, CL Yang, W Wu
Target 11 (10), 00, 2012
NVM Duet: Unified working memory and persistent store architecture
RS Liu, DY Shen, CL Yang, SC Yu, CYM Wang
ACM SIGARCH Computer Architecture News 42 (1), 455-470, 2014
Multiprocessor energy-efficient scheduling with task migration considerations
JJ Chen, HR Hsu, KH Chuang, CL Yang, AC Pang, TW Kuo
Proceedings. 16th Euromicro Conference on Real-Time Systems, 2004. ECRTS …, 2004
Low-power SRAM memory cell
YJ Chang, F Lai, CL Yang
US Patent 7,345,909, 2008
Push vs. pull: Data movement for linked data structures
CL Yang, AR Lebeck
Proceedings of the 14th international conference on Supercomputing, 176-186, 2000
Placement of defect-tolerant digital microfluidic biochips using the T-tree formulation
PH Yuh, CL Yang, YW Chang
ACM Journal on Emerging Technologies in Computing Systems (JETC) 3 (3), 13-es, 2007
Age-based PCM wear leveling with nearly zero search cost
CH Chen, PC Hsiu, TW Kuo, CL Yang, CYM Wang
Proceedings of the 49th Annual Design Automation Conference, 453-458, 2012
Zero-aware asymmetric SRAM cell for reducing cache power in writing zero
YJ Chang, F Lai, CL Yang
IEEE transactions on very large scale integration (VLSI) systems 12 (8), 827-836, 2004
An energy-efficient virtual memory system with flash memory as the secondary storage
HW Tseng, HL Li, CL Yang
ISLPED'06 Proceedings of the 2006 International Symposium on Low Power …, 2006
Temporal floorplanning using the T-tree formulation
PH Yuh, CL Yang, YW Chang
IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004 …, 2004
A progressive-ILP based routing algorithm for cross-referencing biochips
PH Yuh, S Sapatnekar, CL Yang, YW Chang
2008 45th ACM/IEEE Design Automation Conference, 284-289, 2008
Search for a Z'at the Z resonance
O Adriani, M Aguilar-Benitez, S Ahlen, J Alcaraz, A Aloisio, G Alverson, ...
Physics Letters B 306 (1-2), 187-196, 1993
Thermal modeling for 3D-ICs with integrated microchannel cooling
H Mizunuma, CL Yang, YC Lu
Proceedings of the 2009 International Conference on Computer-Aided Design …, 2009
Energy-aware flash memory management in virtual memory system
HL Li, CL Yang, HW Tseng
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 16 (8), 952-964, 2008
Power gating strategies on GPUs
PH Wang, CL Yang, YM Chen, YJ Cheng
ACM Transactions on Architecture and Code Optimization (TACO) 8 (3), 1-25, 2011
Obstacle-avoiding rectilinear Steiner tree construction based on spanning graphs
CW Lin, SY Chen, CF Li, YW Chang, CL Yang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2008
Hotspot cache: joint temporal and spatial locality exploitation for i-cache energy reduction
CL Yang, CH Lee
Proceedings of the 2004 international symposium on Low power electronics and …, 2004
Memory latency reduction via thread throttling
HY Cheng, CH Lin, J Li, CL Yang
2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture, 53-64, 2010
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