Kiamal Pekmestzi
Kiamal Pekmestzi
Emeritus Professor, Electrical & Computer Eng., National Technical Univ. of Athens
Verified email at cs.ntua.gr - Homepage
Title
Cited by
Cited by
Year
Multiplexer-based array multipliers
KZ Pekmestzi
IEEE transactions on computers 48 (1), 15-23, 1999
1051999
Design-efficient approximate multiplication circuits through partial product perforation
G Zervakis, K Tsoumanis, S Xydis, D Soudris, K Pekmestzi
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (10 …, 2016
862016
An optimized modified booth recoder for efficient design of the add-multiply operator
K Tsoumanis, S Xydis, C Efstathiou, N Moschopoulos, K Pekmestzi
IEEE Transactions on Circuits and Systems I: Regular Papers 61 (4), 1133-1143, 2014
632014
Approximate hybrid high radix encoding for energy-efficient inexact multipliers
V Leon, G Zervakis, D Soudris, K Pekmestzi
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26 (3), 421-430, 2017
552017
High performance and area efficient flexible DSP datapath synthesis
S Xydis, G Economakos, D Soudris, K Pekmestzi
IEEE transactions on very large scale integration (VLSI) systems 19 (3), 429-442, 2009
472009
Pipelined array-based FIR filter folding
P Bougas, P Kalivas, A Tsirikos, KZ Pekmestzi
IEEE Transactions on Circuits and Systems I: Regular Papers 52 (1), 108-118, 2005
432005
Designing coarse-grain reconfigurable architectures by inlining flexibility into custom arithmetic data-paths
S Xydis, G Economakos, K Pekmestzi
Integration 42 (4), 486-503, 2009
412009
DONUT: A double node upset tolerant latch
N Eftaxiopoulos, N Axelos, K Pekmestzi
2015 IEEE Computer Society Annual Symposium on VLSI, 509-514, 2015
382015
Delta DICE: A double node upset resilient latch
N Eftaxiopoulos, N Axelos, G Zervakis, K Tsoumanis, K Pekmestzi
2015 IEEE 58th International Midwest Symposium on Circuits and Systems …, 2015
352015
Custom multi-threaded dynamic memory management for multiprocessor system-on-chip platforms
S Xydis, A Bartzas, I Anagnostopoulos, D Soudris, K Pekmestzi
2010 International Conference on Embedded Computer Systems: Architectures …, 2010
352010
On the hardware implementation of the 3GPP confidentiality and integrity algorithms
K Marinis, NK Moshopoulos, F Karoubalis, KZ Pekmestzi
International Conference on Information Security, 248-265, 2001
292001
Walking through the energy-error Pareto frontier of approximate multipliers
V Leon, G Zervakis, S Xydis, D Soudris, K Pekmestzi
IEEE Micro 38 (4), 40-49, 2018
282018
Complex number multipliers
KZ Pekmestzi
IEE Proceedings E (Computers and Digital Techniques) 136 (1), 70-75, 1989
281989
Long unsigned number systolic serial multipliers and squarers
KZ Pekmestzi, P Kalivas, N Moshopoulos
IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 2001
242001
Low-latency bit-parallel systolic VLSI implementation of FIR digital filters
CG Caraiscos, KZ Pekmestzi
IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 1996
221996
Flexible datapath synthesis through arithmetically optimized operation chaining
S Xydis, I Triantafyllou, G Economakos, K Pekmestzi
2009 NASA/ESA Conference on Adaptive Hardware and Systems, 407-414, 2009
212009
Systolic frequency dividers/counters
KZ Pekmestzi, N Thanasouras
IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 1994
201994
DIRT latch: A novel low cost double node upset tolerant latch
N Eftaxiopoulos, N Axelos, K Pekmestzi
Microelectronics Reliability 68, 57-68, 2017
182017
Hybrid approximate multiplier architectures for improved power-accuracy trade-offs
G Zervakis, S Xydis, K Tsoumanis, D Soudris, K Pekmestzi
2015 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2015
182015
An elliptic curve cryptosystem design based on FPGA pipeline folding
O Al-Khaleel, C Papachristou, F Wolff, K Pekmestzi
13th IEEE International On-Line Testing Symposium (IOLTS 2007), 71-78, 2007
182007
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