Παρακολούθηση
Kiamal Pekmestzi
Kiamal Pekmestzi
Emeritus Professor, Electrical & Computer Eng., National Technical Univ. of Athens
Η διεύθυνση ηλεκτρονικού ταχυδρομείου έχει επαληθευτεί στον τομέα cs.ntua.gr - Αρχική σελίδα
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Παρατίθεται από
Παρατίθεται από
Έτος
Design-efficient approximate multiplication circuits through partial product perforation
G Zervakis, K Tsoumanis, S Xydis, D Soudris, K Pekmestzi
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (10 …, 2016
1722016
Approximate hybrid high radix encoding for energy-efficient inexact multipliers
V Leon, G Zervakis, D Soudris, K Pekmestzi
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26 (3), 421-430, 2017
1642017
Multiplexer-based array multipliers
KZ Pekmestzi
IEEE transactions on computers 48 (1), 15-23, 1999
1071999
Delta DICE: A double node upset resilient latch
N Eftaxiopoulos, N Axelos, G Zervakis, K Tsoumanis, K Pekmestzi
2015 IEEE 58th International Midwest Symposium on Circuits and Systems …, 2015
852015
DONUT: A double node upset tolerant latch
N Eftaxiopoulos, N Axelos, K Pekmestzi
2015 IEEE Computer Society Annual Symposium on VLSI, 509-514, 2015
852015
An optimized modified booth recoder for efficient design of the add-multiply operator
K Tsoumanis, S Xydis, C Efstathiou, N Moschopoulos, K Pekmestzi
IEEE Transactions on Circuits and Systems I: Regular Papers 61 (4), 1133-1143, 2014
732014
Walking through the energy-error Pareto frontier of approximate multipliers
V Leon, G Zervakis, S Xydis, D Soudris, K Pekmestzi
IEEE Micro 38 (4), 40-49, 2018
622018
Pipelined array-based FIR filter folding
P Bougas, P Kalivas, A Tsirikos, KZ Pekmestzi
IEEE Transactions on Circuits and Systems I: Regular Papers 52 (1), 108-118, 2005
512005
High performance and area efficient flexible DSP datapath synthesis
S Xydis, G Economakos, D Soudris, K Pekmestzi
IEEE transactions on very large scale integration (VLSI) systems 19 (3), 429-442, 2009
452009
Cooperative arithmetic-aware approximation techniques for energy-efficient multipliers
V Leon, K Asimakopoulos, S Xydis, D Soudris, K Pekmestzi
Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019
442019
DIRT latch: A novel low cost double node upset tolerant latch
N Eftaxiopoulos, N Axelos, K Pekmestzi
Microelectronics Reliability 68, 57-68, 2017
402017
Designing coarse-grain reconfigurable architectures by inlining flexibility into custom arithmetic data-paths
S Xydis, G Economakos, K Pekmestzi
Integration 42 (4), 486-503, 2009
382009
Custom multi-threaded dynamic memory management for multiprocessor system-on-chip platforms
S Xydis, A Bartzas, I Anagnostopoulos, D Soudris, K Pekmestzi
2010 International Conference on Embedded Computer Systems: Architectures …, 2010
372010
On the hardware implementation of the 3GPP confidentiality and integrity algorithms
K Marinis, NK Moshopoulos, F Karoubalis, KZ Pekmestzi
International Conference on Information Security, 248-265, 2001
362001
Multi-level approximate accelerator synthesis under voltage island constraints
G Zervakis, S Xydis, D Soudris, K Pekmestzi
IEEE Transactions on Circuits and Systems II: Express Briefs 66 (4), 607-611, 2018
342018
Hybrid approximate multiplier architectures for improved power-accuracy trade-offs
G Zervakis, S Xydis, K Tsoumanis, D Soudris, K Pekmestzi
2015 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2015
322015
Complex number multipliers
KZ Pekmestzi
IEE Proceedings E (Computers and Digital Techniques) 136 (1), 70-75, 1989
321989
Efficient high level synthesis exploration methodology combining exhaustive and gradient-based pruned searching
S Xydis, C Skouroumounis, K Pekmestzi, D Soudris, G Economakos
2010 IEEE Computer Society Annual Symposium on VLSI, 104-109, 2010
292010
Long unsigned number systolic serial multipliers and squarers
KZ Pekmestzi, P Kalivas, N Moshopoulos
IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 2001
262001
Systolic frequency dividers/counters
KZ Pekmestzi, N Thanasouras
IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 1994
261994
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