Design of analog-digital VLSI circuits for telecommunications and signal processing JE Franca, Y Tsividis Prentice-Hall, Inc., 1994 | 132 | 1994 |
A CMOS humidity sensor with on-chip calibration YY Qiu, C Azeredo-Leme, LR Alcacer, JE Franca Sensors and Actuators A: Physical 92 (1-3), 80-87, 2001 | 113 | 2001 |
Systematic design for optimization of high-speed self-calibrated pipelined A/D converters J Goes, JC Vital, JE Franca IEEE transactions on circuits and systems II: Analog and digital signal …, 1998 | 94 | 1998 |
Nonrecursive polyphase switched-capacitor decimators and interpolators J da Franca IEEE transactions on Circuits and Systems 32 (9), 877-887, 1985 | 87 | 1985 |
CAD tools for data converter design: An overview GGE Gielen, JE Franca IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 1996 | 67 | 1996 |
Correction of frequency-dependent I/Q mismatches in quadrature receivers KP Pun, JE Franca, C Azeredo-Leme, CF Chan, CS Choy Electronics Letters 37 (23), 1, 2001 | 57 | 2001 |
Multirate analog-digital systems for signal processing and conversion J Franca, A Petraglia, SK Mitra Proceedings of the IEEE 85 (2), 242-262, 1997 | 54 | 1997 |
Analogue-digital ASICS: circuit techniques, design tools and applications RS Soin, F Maloberti, J Franca IET, 1991 | 51 | 1991 |
Introduction to analog VLSI design automation M Ismail, JE Franca Springer Science & Business Media, 2012 | 47 | 2012 |
Wideband digital correction of I and Q mismatch in quadrature radio receivers KP Pun, JE Franca, C Azeredo-Leme 2000 IEEE International Symposium on Circuits and Systems (ISCAS) 5, 661-664, 2000 | 46 | 2000 |
Systematic design for optimisation of pipelined ADCs J Goes, JC Vital, JE Franca Springer Science & Business Media, 2006 | 45 | 2006 |
Oscillation test methodology for a digitally-programmable switched-current biquad PM Dias, JE Franca, N Paulino Proc. IEEE Int’l Mixed Signal Testing Workshop, Quebec City, 221-226, 1996 | 39 | 1996 |
Design and applications of single-path frequency-translated switched-capacitor systems JE Da Franca, DG Haigh IEEE transactions on circuits and systems 35 (4), 394-408, 1988 | 35 | 1988 |
FIR switched-capacitor decimators with active-delayed block polyphase structures JE Franca, S Santos IEEE transactions on circuits and systems 35 (8), 1033-1037, 1988 | 34 | 1988 |
Quadrature sampling schemes with improved image rejection KP Pun, JE da Franca, C Azeredo-Leme, R Reis IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 2003 | 32 | 2003 |
Digital frequency tuning technique based on current division for integrated active RC filters KP Pun, CS Choy, CF Chan, JE Da Franca Electronics Letters 39 (19), 1366-1367, 2003 | 31 | 2003 |
Circuit design for wireless communications: improved techniques for image rejection in wideband quadrature receivers KP Pun, JE Da Franca, C Azeredo-Leme Springer Science & Business Media, 2013 | 29 | 2013 |
Programmable CMOS switched-capacitor biquad using quasi-passive algorithmic DAC's N Paulino, JE Franca, FP Martins IEEE Journal of Solid-State Circuits 30 (6), 715-719, 1995 | 28 | 1995 |
New CMOS logarithmic A/D converters employing pipeline and algorithmic architectures J Guilherme, JE Franca Proceedings of ISCAS'95-International Symposium on Circuits and Systems 1 …, 1995 | 28 | 1995 |
An optimum CMOS switched-capacitor antialiasing decimating filter RP Martins, JE Franca, F Maloberti IEEE Journal of Solid-State Circuits 28 (9), 962-970, 1993 | 28 | 1993 |