Optimizing software runtime systems for speculative parallelization P Yiapanis, D Rosas-Ham, G Brown, M Luján ACM Transactions on Architecture and Code Optimization (TACO) 9 (4), 1-27, 2013 | 42 | 2013 |
A case for Exiting a Transaction in the Context of Hardware Transactional Memory I Herath, D Rosas-Ham, D Goodman, M Luján, I Watson 7th ACM SIGPLAN Ws on Transact. Computing, 2012 | 3 | 2012 |
Dynamic scheduling in multicore processors DR Ham PQDT-UK & Ireland, 2012 | 2 | 2012 |
Architectural Support for Exploiting Fine Grain Parallelism D Rosas-Ham, I Herath, P Yiapanis, M Luj'n, I Watson 2012 IEEE 14th International Conference on High Performance Computing and …, 2012 | 1 | 2012 |
SnCTM: reducing false transaction aborts by adaptively changing the source of conflict detection I Herath, D Rosas-Ham, M Luján, I Watson Proceedings of the 9th conference on Computing Frontiers, 65-74, 2012 | 1 | 2012 |
Dynamic Scheduling in Multicore Processors D Rosas Ham The University of Manchester, Manchester, UK, 2012 | | 2012 |
First Insight into Relaxed Transactional Memory I Herath, D Rosas, B Khan, I Watson ACACES 2010 Poster Abstracts, 59-62, 2010 | | 2010 |