| A Fine-Grain Variation-Aware Dynamic -Hopping AVFS Architecture on a 32 nm GALS MPSoC I Miro-Panades, E Beigné, Y Thonnart, L Alacoque, P Vivet, S Lesecq, ... IEEE Journal of Solid-State Circuits 49 (7), 1475-1486, 2014 | 35 | 2014 |
| An efficient and flexible hardware support for accelerating synchronization operations on the sthorm many-core architecture F Thabet, Y Lhuillier, C Andriamisaina, JM Philippe, R David 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 531-534, 2013 | 23 | 2013 |
| HARS: A hardware-assisted runtime software for embedded many-core architectures Y Lhuillier, M Ojail, A Guerre, JM Philippe, KB Chehida, F Thabet, ... ACM Transactions on Embedded Computing Systems (TECS) 13 (3s), 1-25, 2014 | 17 | 2014 |
| A fine grain variation-aware dynamic Vdd-hopping AVFS architecture on a 32nm GALS MPSoC E Beigné, I Miro-Panades, Y Thonnart, L Alacoque, P Vivet, S Lesecq, ... 2013 Proceedings of the ESSCIRC (ESSCIRC), 57-60, 2013 | 9 | 2013 |
| A methodology for timing and structural communication refinement in dsp systems F Thabet, JB Le Goff, P Coussy, E Martin Proceedings. The 16th International Conference on Microelectronics, 2004 …, 2004 | 4 | 2004 |
| Work in progress: Automatic construction of pipeline datapaths from high-level HDL code SA Bensaid, M Asavoae, F Thabet, M Jan 2022 IEEE 28th Real-Time and Embedded Technology and Applications Symposium …, 2022 | 3 | 2022 |
| Device and method for synchronizing tasks executed in parallel on a platform comprising several calculation units F Thabet, Y Lhuillier, R David US Patent 9,513,973, 2016 | 2 | 2016 |
| Exploration and rapid prototyping of DSP applications using systemc behavioral simulation and high-level synthesis F Thabet, P Coussy, D Heller, E Martin Journal of Signal Processing Systems 56, 167-186, 2009 | 2 | 2009 |
| Design Space Exploration of DSP Applications Based on Behavioral Description Models F Thabet, P Coussy, D Heller, E Martin 2006 IEEE Workshop on Signal Processing Systems Design and Implementation …, 2006 | 2 | 2006 |
| Behavioral description model BDM for design space exploration: A case study of HIS algorithm for MC-CDMA system F Thabet, P Coussy, D Heller, E Martin 2007 15th European Signal Processing Conference, 1625-1629, 2007 | 1 | 2007 |
| Modélisation comportementale unifiée pour la simulation et la synthèse haut-niveau de composants virtuels algorithmiques F Thabet Lorient, 2007 | 1 | 2007 |
| Approche Automatique pour le Raffinement des Communications F Thabet, P Coussy, E Martin Actes Journées Francophones sur l'Adéquation Algorithme/Architecture (JFAAA …, 2005 | 1 | 2005 |
| SECURE PLATFORM FOR ICT SYSTEMS ROOTED AT THE SILICON MANUFACTURING PROCESS C Andriamisaina, F Thabet, JR Coulon, G Chauvon, AC Aldaya, N Tuveri, ... | | 2023 |
| Deriving Pipeline Models for Timing Analysis from High-Level HDL Processor Designs SA Bensaid, M Asavoae, F Thabet, M Jan 2022 20th ACM-IEEE International Conference on Formal Methods and Models for …, 2022 | | 2022 |
| Pipeline Datapath Models from RISC-V based cores SA Bensaid, M Asavoae, F Thabet, M Jan Spring 2022 RISC-V Week, 0, 2022 | | 2022 |
| Formal Processor Modeling for Analyzing Safety and Security Properties B Binder, SA Bensaid, S Tollec, F Thabet, M Asavoae, M Jan Embedded Real Time Systems (ERTS), 1-10, 2022 | | 2022 |
| Method for managing energy consumption for multiprocessor systems using an offline phase for characterization of a variation of a potential rate of parallelism for task … F Thabet, KB Chehida, F Blanc US Patent 9,146,602, 2015 | | 2015 |
| Towards an Automatic Co-generator for Manycoresą Architecture and Runtime: STHORM case-study C Bechara, KB Chehida, F Thabet Procedia Computer Science 51, 2809-2813, 2015 | | 2015 |
