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Taiki Yamae
Taiki Yamae
Verified email at aist.go.jp
Title
Cited by
Cited by
Year
An adiabatic superconductor 8-bit adder with 24kBT energy dissipation per junction
N Takeuchi, T Yamae, CL Ayala, H Suzuki, N Yoshikawa
Applied Physics Letters 114 (4), 2019
562019
Adiabatic quantum-flux-parametron: Towards building extremely energy-efficient circuits and systems
O Chen, R Cai, Y Wang, F Ke, T Yamae, R Saito, N Takeuchi, ...
Scientific reports 9 (1), 10514, 2019
442019
Adiabatic Quantum-Flux-Parametron: A Tutorial Review
N TAKEUCHI, T YAMAE, CL AYALA, H SUZUKI, N YOSHIKAWA
IEICE Transactions on Electronics 105 (6), 251-263, 2022
242022
A compact AQFP logic cell design using an 8-metal layer superconductor process
Y He, CL Ayala, N Takeuchi, T Yamae, Y Hironaka, A Sahu, V Gupta, ...
Superconductor Science and Technology 33 (3), 035010, 2020
242020
A reversible full adder using adiabatic superconductor logic
T Yamae, N Takeuchi, N Yoshikawa
Superconductor Science and Technology 32 (3), 035005, 2019
162019
Systematic method to evaluate energy dissipation in adiabatic quantum-flux-parametron logic
T Yamae, N Takeuchi, N Yoshikawa
Journal of Applied Physics 126 (17), 2019
142019
Adiabatic quantum-flux-parametron with delay-line clocking: logic gate demonstration and phase skipping operation
T Yamae, N Takeuchi, N Yoshikawa
Superconductor Science and Technology 34 (12), 125002, 2021
102021
Binary counters using adiabatic quantum-flux-parametron logic
T Yamae, N Takeuchi, N Yoshikawa
IEEE Transactions on Applied Superconductivity 31 (2), 1-5, 2020
92020
Scalable flux controllers using adiabatic superconductor logic for quantum processors
N Takeuchi, T Yamae, W Luo, F Hirayama, T Yamamoto, N Yoshikawa
Physical Review Research 5 (1), 013145, 2023
82023
Planarized Nb 4-Layer Fabrication Process for Superconducting Integrated Circuits and Its Fabricated Device Evaluation
S Nagasawa, M Tanaka, N Takeuchi, Y Yamanashi, S Miyajima, F China, ...
IEICE Transactions on Electronics 104 (9), 435-445, 2021
52021
An adiabatic superconductor comparator with 46 nA sensitivity
N Takeuchi, T Yamae, H Suzuki, N Yoshikawa
IEEE Transactions on Applied Superconductivity 31 (5), 1-5, 2021
52021
Design and demonstration of directly coupled quantum-flux-parametron circuits with optimized parameters
R Ishida, N Takeuchi, T Yamae, N Yoshikawa
IEEE Transactions on Applied Superconductivity 31 (5), 1-5, 2021
52021
Low-latency adiabatic quantum-flux-parametron circuit integrated with a hybrid serializer/deserializer
Y Hironaka, T Yamae, CL Ayala, N Yoshikawa, N Takeuchi
IEEE Access 10, 133584-133590, 2022
32022
An Adiabatic Quantum-Flux-Parametron 8-bit Ripple Carry Adder Using Delay-Line Clocking
T Yamae, N Takeuchi, N Yoshikawa
IEEE Transactions on Applied Superconductivity 33 (5), 1-4, 2023
22023
Parameter optimization of directly coupled quantum flux parametron circuits
R Ishida, N Takeuchi, T Yamae, N Yoshikawa
電子情報通信学会技術研究報告= IEICE technical report: 信学技報 119 (369), 91-93, 2020
22020
Scalable quantum-bit controller using adiabatic superconductor logic
N Takeuchi, T Yamae, T Yamashita, T Yamamoto, N Yoshikawa
arXiv preprint arXiv:2310.06544, 2023
12023
Minimum energy dissipation required for information processing using adiabatic quantum-flux-parametron circuits
T Yamae, N Takeuchi, N Yoshikawa
Journal of Applied Physics 135 (6), 2024
2024
超低電力コンピューティングのための断熱磁束量子パラメトロンのパラメータ設計法
竹内尚輝, 山栄大樹, 鈴木秀雄, 吉川信行
電子情報通信学会論文誌 C 105 (11), 329-338, 2022
2022
Adiabatic Quantum-Flux-Parametron with Delay-Line Clocking Using Square Excitation Currents
T YAMAE, N TAKEUCHI, N YOSHIKAWA
IEICE Transactions on Electronics 105 (6), 277-282, 2022
2022
Delay-line clocking を用いた断熱量子磁束パラメトロン 8-bit 加算器の動作実証
山栄大樹, 竹内尚輝, 吉川信行
IEICE Conferences Archives, 2022
2022
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Articles 1–20