Παρακολούθηση
Stavros Simoglou
Stavros Simoglou
PhD Candidate, Circuits and Systems Lab, University of Thessaly and Synopsys Inc.
Η διεύθυνση ηλεκτρονικού ταχυδρομείου έχει επαληθευτεί στον τομέα uth.gr
Τίτλος
Παρατίθεται από
Παρατίθεται από
Έτος
Gate delay estimation with library compatible current source models and effective capacitance
D Garyfallou, S Simoglou, N Sketopoulos, C Antoniadis, CP Sotiriou, ...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 29 (5), 962-972, 2021
152021
Graph-based STA for asynchronous controllers
N Xiromeritis, S Simoglou, C Sotiriou, N Sketopoulos
2019 29th International Symposium on Power and Timing Modeling, Optimization …, 2019
132019
Abax: 2D/3D legaliser supporting look-ahead legalisation and blockage strategies
N Sketopoulos, C Sotiriou, S Simoglou
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2018
102018
Graph-based STA for asynchronous controllers
S Simoglou, N Xiromeritis, C Sotiriou, N Sketopoulos
Integration 75, 91-101, 2020
42020
STA for mixed cyclic, acyclic circuits
S Simoglou, C Sotiriou, D Valiantzas, N Sketopoulos
2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 392-397, 2020
42020
Static timing analysis induced simulation errors for asynchronous circuits
S Simoglou, C Sotiriou, N Blias
2021 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2021
32021
Timing errors in sta-based gate-level simulation
S Simoglou, C Sotiriou, N Blias
2020 26th IEEE International Symposium on Asynchronous Circuits and Systems …, 2020
22020
Investigation on Performance, Power, Area Trade-Offs using Deterministic and Monte-Carlo Process Variation Aware Synthesis Flows
N Blias, I Lilitsis, S Simoglou, E Bakas, C Sotiriou
2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration …, 2022
12022
Towards a Comprehensive SET Analysis Flow for VLSI Circuits using Static Timing Analysis
C Georgakidis, D Valiantzas, S Simoglou, I Lilitsis, N Chatzivangelis, ...
2023 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2023
2023
RADPlace-MS: A Timing-Driven Placer and Optimiser for ASICs Radiation Hardening
C Georgakidis, S Simoglou, C Sotiriou
2022 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2022
2022
Single Event Transients Generation and Propagation Flow using Commercial EDA Tools
S Simoglou, C Georgakidis, I Lilitsis, C Sotiriou, M Andjelkovic, M Krstic
2021 IEEE 32nd International Conference on Microelectronics (MIEL), 333-336, 2021
2021
36rd IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems
AA Koufopoulou, A Papadimitriou, A Pikrakis, M Psarakis, D Hely, ...
ASYNC 2020
S Simoglou, C Sotiriou, MLL Sartori, MT Moreira, NLV Calazans, ...
Δεν είναι δυνατή η εκτέλεση της ενέργειας από το σύστημα αυτή τη στιγμή. Προσπαθήστε ξανά αργότερα.
Άρθρα 1–13