A survey and evaluation of fpga high-level synthesis tools R Nane, VM Sima, C Pilato, J Choi, B Fort, A Canis, YT Chen, H Hsiao, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2016 | 740 | 2016 |
Automating the design of processor/accelerator embedded systems with legup high-level synthesis B Fort, A Canis, J Choi, N Calagar, R Lian, S Hadjis, YT Chen, M Hall, ... Embedded and Ubiquitous Computing (EUC), 2014 12th IEEE International …, 2014 | 46 | 2014 |
LegUp High-Level Synthesis A Canis, J Choi, B Fort, B Syrowik, RL Lian, YT Chen, H Hsiao, J Goeders, ... FPGAs for Software Programmers, 175-190, 2016 | 30 | 2016 |