| Finn: A framework for fast, scalable binarized neural network inference Y Umuroglu, NJ Fraser, G Gambardella, M Blott, P Leong, M Jahre, ... Proceedings of the 2017 ACM/SIGDA International Symposium on Field …, 2017 | 541 | 2017 |
| Experimental validation of the learning effect for a pedagogical game on computer fundamentals G Sindre, L Natvig, M Jahre IEEE Transactions on Education 52 (1), 10-18, 2008 | 85 | 2008 |
| Hybrid breadth-first search on a single-chip FPGA-CPU heterogeneous platform Y Umuroglu, D Morrison, M Jahre 2015 25th International Conference on Field Programmable Logic and …, 2015 | 46 | 2015 |
| Scaling binarized neural networks on reconfigurable logic NJ Fraser, Y Umuroglu, G Gambardella, M Blott, P Leong, M Jahre, ... Proceedings of the 8th Workshop and 6th Workshop on Parallel Programming and …, 2017 | 38 | 2017 |
| The READEX formalism for automatic tuning for energy efficiency J Schuchart, M Gerndt, PG Kjeldsberg, M Lysaght, D Horák, L Říha, ... Computing 99 (8), 727-745, 2017 | 28 | 2017 |
| Optimized Hardware for Suboptimal Software: The Case for SIMD-aware Benchmarks JM Cebrián, M Jahre, L Natvig International Symposium on Performance Analysis of Systems and Software (ISPASS), 2014 | 25 | 2014 |
| A light-weight fairness mechanism for chip multiprocessor memory systems M Jahre, L Natvig Proceedings of the 6th ACM conference on Computing frontiers, 1-10, 2009 | 24 | 2009 |
| TULIPP: Towards ubiquitous low-power image processing platforms T Kalb, L Kalms, D Göhringer, C Pons, F Marty, A Muddukrishna, M Jahre, ... 2016 International Conference on Embedded Computer Systems: Architectures …, 2016 | 21 | 2016 |
| Storage efficient hardware prefetching using delta-correlating prediction tables M Grannaes, M Jahre, L Natvig Journal of Instruction-Level Parallelism 13, 1-16, 2011 | 21 | 2011 |
| ParVec: vectorizing the PARSEC benchmark suite JM Cebrian, M Jahre, L Natvig Computing 97 (11), 1077-1100, 2015 | 19 | 2015 |
| An Energy Efficient Column-Major Backend for FPGA SpMV Accelerators Y Umuroglu, M Jahre The 32nd IEEE International Conference on Computer Design (ICCD), 2014 | 19 | 2014 |
| EPIC: An energy-efficient, high-performance GPGPU computing research infrastructure M Själander, M Jahre, G Tufte, N Reissmann arXiv preprint arXiv:1912.05848, 2019 | 17 | 2019 |
| Supporting utilities for heterogeneous embedded image processing platforms (STHEM): An overview A Sadek, A Muddukrishna, L Kalms, A Djupdal, A Podlubne, A Paolillo, ... International Symposium on Applied Reconfigurable Computing, 737-749, 2018 | 14 | 2018 |
| A vector caching scheme for streaming fpga spmv accelerators Y Umuroglu, M Jahre International Symposium on Applied Reconfigurable Computing, 15-26, 2015 | 14 | 2015 |
| A high performance adaptive miss handling architecture for chip multiprocessors M Jahre, L Natvig Transactions on High-Performance Embedded Architectures and Compilers IV, 1-20, 2011 | 13 | 2011 |
| Get Out of the Valley: Power-Efficient Address Mapping for GPUs Y Liu, X Zhao, M Jahre, Z Wang, X Wang, Y Luo, L Eeckhout International Symposium on Computer Architecture (ISCA), 2018 | 12 | 2018 |
| A quantitative study of memory system interference in chip multiprocessor architectures M Jahre, M Grannaes, L Natvig 2009 11th IEEE International Conference on High Performance Computing and …, 2009 | 12 | 2009 |
| Streamlined deployment for quantized neural networks Y Umuroglu, M Jahre arXiv preprint arXiv:1709.04060, 2017 | 11 | 2017 |
| A study of energy and locality effects using space-filling curves N Reissman, JC Meyer, M Jahre 2014 IEEE International Parallel & Distributed Processing Symposium …, 2014 | 11 | 2014 |
| Performance effects of a cache miss handling architecture in a multi-core processor M Jahre, L Natvig | 11 | 2007 |
Lasse NatvigProfessor of Computer Science, Norwegian University of Science and Technology (NTNU)Verified email at ntnu.no
