Follow
Stefan Frehse
Stefan Frehse
Unknown affiliation
Verified email at mailbox.org - Homepage
Title
Cited by
Cited by
Year
Revkit: a Toolkit for reversible circuit design.
M Soeken, S Frehse, R Wille, R Drechsler
J. Multiple Valued Log. Soft Comput. 18 (1), 55-65, 2012
1342012
RevKit: An open source toolkit for the design of reversible circuits
M Soeken, S Frehse, R Wille, R Drechsler
Reversible Computation: Third International Workshop, RC 2011, Gent, Belgium …, 2012
962012
Debugging of Toffoli networks
R Wille, D Große, S Frehse, GW Dueck, R Drechsler
2009 Design, Automation & Test in Europe Conference & Exhibition, 1284-1289, 2009
432009
Effective robustness analysis using bounded model checking techniques
G Fey, A Sulflow, S Frehse, R Drechsler
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2011
422011
metaSMT: Focus on Your Application not on Solver Integration.
F Haedicke, S Frehse, G Fey, D Große, R Drechsler
DIFTS@ FMCAD, 47, 2011
392011
metaSMT: focus on your application and not on solver integration
H Riener, F Haedicke, S Frehse, M Soeken, D Große, R Drechsler, G Fey
International Journal on Software Tools for Technology Transfer 19 (5), 605-621, 2017
202017
Complete and effective robustness checking by means of interpolation
S Frehse, G Fey, E Arbel, K Yorav, R Drechsler
2012 Formal Methods in Computer-Aided Design (FMCAD), 82-90, 2012
152012
Enhancing debugging of multiple missing control errors in reversible logic
JC Jung, S Frehse, R Wille, R Drechsler
Proceedings of the 20th symposium on Great lakes symposium on VLSI, 465-470, 2010
122010
Robustness check for multiple faults using formal techniques
S Frehse, G Fey, A Suflow, R Drechsler
2009 12th Euromicro Conference on Digital System Design, Architectures …, 2009
122009
Debugging reversible circuits
R Wille, D Große, S Frehse, GW Dueck, R Drechsler
Integration 44 (1), 51-61, 2011
112011
A better-than-worst-case robustness measure
S Frehse, G Fey, R Drechsler
13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and …, 2010
112010
Determining application-specific knowledge for improving robustness of sequential circuits
S Huhn, S Frehse, R Wille, R Drechsler
IEEE Transactions on very large scale integration (VLSI) systems 27 (4), 875-887, 2019
92019
Efficient simulation-based debugging of reversible logic
S Frehse, R Wille, R Drechsler
2010 40th IEEE International Symposium on Multiple-Valued Logic, 156-161, 2010
72010
Enhancing robustness of sequential circuits using application-specific knowledge and formal methods
S Huhn, S Frehse, R Wille, R Drechsler
2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), 182-187, 2017
52017
Anwendungsbezogene Analyse der Robustheit von digitalen Schaltungen
A Sülflow, S Frehse, G Fey, R Drechsler
GMM/GI/ITG-Fachtagung Zuverlässigkeit und Entwurf, 45-52, 2009
42009
Improving fault tolerance utilizing hardware-software-co-synthesis
H Riener, S Frehse, G Fey
2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 939-942, 2013
32013
Determining minimal testsets for reversible circuits using Boolean satisfiability
H Zhang, S Frehse, R Wille, R Drechsler
IEEE Africon'11, 1-6, 2011
32011
RobuCheck: A robustness checker for digital circuits
S Frehse, G Fey, A Sülflow, R Drechsler
Proceedings of the First Workshop on DYnamic Aspects in DEpendability Models …, 2010
22010
Formaler Nachweis der Fehlertoleranz von Schaltkreisen
G Fey, A Sülflow, S Frehse, U Kühne, R Drechsler
Tagungsband 2, 75-82, 2008
22008
Hardware-Software-Co-Synthese zur Verbesserung der Fehlertoleranz
S Frehse, H Riener, G Fey
GMM/GI/ITG-Fachtagung Zuverlässigkeit und Entwurf (ZUE), 2012
12012
The system can't perform the operation now. Try again later.
Articles 1–20