| A fault tolerant voter for approximate triple modular redundancy T Arifeen, AS Hassan, JA Lee Electronics 8 (3), 332, 2019 | 38 | 2019 |
| Probing approximate TMR in error resilient applications for better design tradeoffs T Arifeen, AS Hassan, H Moradian, JA Lee 2016 Euromicro Conference on Digital System Design (DSD), 637-640, 2016 | 26 | 2016 |
| Approximate triple modular redundancy: A survey T Arifeen, AS Hassan, JA Lee IEEE Access 8, 139851-139867, 2020 | 24 | 2020 |
| Input vulnerability‐aware approximate triple modular redundancy: higher fault coverage, improved search space, and reduced area overhead T Arifeen, AS Hassan, H Moradian, JA Lee Electronics Letters 54 (15), 934-936, 2018 | 17 | 2018 |
| Data footprint reduction in DNN inference by sensitivity-controlled approximations with online arithmetic AS Hassan, T Arifeen, JA Lee 2020 23rd Euromicro Conference on Digital System Design (DSD), 534-541, 2020 | 11 | 2020 |
| Generation methodology for good-enough approximate modules of ATMR AS Hassan, T Arifeen, H Moradian, JA Lee Journal of Electronic Testing 34, 651-665, 2018 | 11 | 2018 |
| Input-Aware Implication Selection Scheme Utilizing ATPG for Efficient Concurrent Error Detection AS Hassan, U Afzaal, T Arifeen, JA Lee Electronics 7 (10), 258, 2018 | 6 | 2018 |
| Far UV-C lights and fiber optics induced and selective far UV-C treatment against COVID-19 for fatality-survival tradeoff I Haider, A Ali, T Arifeen, AS Hassan Authorea Preprints, 2023 | 4 | 2023 |
| Low Latency and High Throughput Pipelined Online Adder for Streaming Inner Product T Arifeen, S Gorgin, MH Gholamrezaei, AS Hassan, MD Ercegovac, ... Journal of Signal Processing Systems 95 (7), 815-829, 2023 | 3 | 2023 |
| Effect of FPGA Circuit Implementation on Error Detection Using Logic Implication Checking U Afzaal, AS Hassan, T Arifeen, JA Lee 2018 21st Euromicro Conference on Digital System Design (DSD), 196-200, 2018 | 3 | 2018 |
| Improved error detection performance of logic implication checking in FPGA circuits U Afzaal, AS Hassan, JA Lee Microprocessors and Microsystems 78, 103179, 2020 | 2 | 2020 |
| SYNTHENSIS AND COMPARATIVE ANALYSIS OF PHARMACEUTICAL FORMULATION OF PARACE TAMOL M NU, AA Ambi, AY Usman, A Hassan, A Umar, HG Mustapha GSJ 8 (9), 2020 | 2 | 2020 |
| Error correctable approximate multiplier with area/power efficient design through mixed CMOS/PTL T Arifeen, AS Hassan, JA Lee 2018 21st Euromicro Conference on Digital System Design (DSD), 190-195, 2018 | 2 | 2018 |
| Adder with reduced latency and minimized interconnect for streaming inner products T Arifeen, AS Hassan, JA Lee, MD Ercegovac 2021 55th Asilomar Conference on Signals, Systems, and Computers, 938-942, 2021 | 1 | 2021 |
| Emerging Foodborne Pathogens: Challenges and Strategies for Ensur-ing Food Safety. 2023, 3, x A Hassan, A Usman fresh produce 36, 22-25, 2023 | | 2023 |
| Investigating the Relationship Between Food Quality and Mental Health. 2023, 3, x A Hassan s Note: MDPI stays neutral with regard to jurisdictional claims in published …, 2023 | | 2023 |
| On the Evolutionary Synthesis of Fault-Resilient Digital Circuits U Afzaal, AS Hassan, M Usman, JA Lee IEEE Transactions on Evolutionary Computation 27 (2), 281-295, 2022 | | 2022 |
| Accuracy Analyzing of Approximate Adders Based on Input Data Range in IoT ASHPJAL Hossein Moradian, Tooba Arifeen JCCI 2017, 2017 | | 2017 |
| Area and Power Efficient Adders for Digital Processing Systems HMJAL Tooba Arifeen, Abdus Sami Hassan JCCI 2017, 2017 | | 2017 |
| FPGA Based Low Power Design of An FIR Filter Using Polyphase Decomposition AS Hassan, A Hassan, T Arifeen, H Moradien, JA Lee 한국정보과학회 학술발표논문집, 1547-1549, 2016 | | 2016 |
Jeong-A LeeProfessor, Department of Computer Engineering, Chosun UniversityVerified email at chosun.ac.kr
