| Low-power near-threshold 10T SRAM bit cells with enhanced data-independent read port leakage for array augmentation in 32-nm CMOS S Gupta, K Gupta, BH Calhoun, N Pandey IEEE Transactions on Circuits and Systems I: Regular Papers 66 (3), 978-988, 2018 | 79 | 2018 |
| A 32-nm subthreshold 7T SRAM bit cell with read assist S Gupta, K Gupta, N Pandey IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (12 …, 2017 | 61 | 2017 |
| PentavariateAnalysis of a Subthreshold 10T SRAM Bit Cell With Variation Tolerant Write and Divided Bit-Line Read S Gupta, K Gupta, N Pandey IEEE Transactions on Circuits and Systems I: Regular Papers 65 (10), 3326-3337, 2018 | 41 | 2018 |
| A low power subthreshold Schmitt Trigger based 12T SRAM bit cell with process-variation-tolerant write-ability P Sharma, S Gupta, K Gupta, N Pandey Microelectronics Journal 97, 104703, 2020 | 34 | 2020 |
| An open-source framework for autonomous SoC design with analog block generation T Ajayi, S Kamineni, YK Cherivirala, M Fayazi, K Kwon, M Saligane, ... 2020 IFIP/IEEE 28th International Conference on Very Large Scale Integration …, 2020 | 29 | 2020 |
| A 65nm 16kb SRAM with 131.5 pW leakage at 0.9 V for wireless IoT sensor nodes S Gupta, DS Truesdell, BH Calhoun 2020 IEEE Symposium on VLSI Circuits, 1-2, 2020 | 10 | 2020 |
| Performance evaluation of SRAM cells for deep submicron technologies S Gupta, K Gupta, N Pandey 2016 Second International Innovative Applications of Computational …, 2016 | 9 | 2016 |
| Dynamic Read VMIN and Yield Estimation for Nanoscale SRAMs S Gupta, BH Calhoun IEEE Transactions on Circuits and Systems I: Regular Papers 68 (3), 1171-1182, 2020 | 8 | 2020 |
| MemGen: An open-source framework for autonomous generation of memory macros S Kamineni, S Gupta, BH Calhoun 2021 IEEE Custom Integrated Circuits Conference (CICC), 1-2, 2021 | 7 | 2021 |
| Stability analysis of different dual-port SRAM cells in deep submicron region using N-Curve Method S Gupta, K Gupta, N Pandey 2016 International Conference on Signal Processing and Communication (ICSC …, 2016 | 6 | 2016 |
| NanoWattch: A self-powered 3-nW RISC-V SoC operable from 160mV photovoltaic input with integrated temperature sensing and adaptive performance scaling DS Truesdell, X Liu, J Breiholz, S Gupta, S Li, BH Calhoun 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2022 | 4 | 2022 |
| Dynamic Write VMIN and Yield Estimation for Nanoscale SRAMs S Gupta, BH Calhoun IEEE Transactions on Circuits and Systems I: Regular Papers 68 (12), 5038-5048, 2021 | 4 | 2021 |
| Fully autonomous mixed signal SoC design & layout generation platform T Ajayi, Y Cherivirala, K Kwon, S Kamineni, M Saligane, M Fayazi, ... IEEE, 2020 | 4 | 2020 |
| Fully-Autonomous SoC Synthesis Using Customizable Cell-Based Analog and Mixed-Signal Circuits Generation T Ajayi, S Kamineni, M Fayazi, YK Cherivirala, K Kwon, S Gupta, W Duan, ... VLSI-SoC: Design Trends: 28th IFIP WG 10.5/IEEE International Conference on …, 2021 | | 2021 |
| Hot Chips 2020 Posters F Elsabbagh, B Tine, A Chawda, W Gulian, Y Feng, P Roshan, E Lyons, ... 2020 IEEE Hot Chips 32 Symposium (HCS), 1-159, 2020 | | 2020 |
