| OTAWA: An open toolbox for adaptive WCET analysis C Ballabriga, H Cassé, C Rochange, P Sainrat IFIP International Workshop on Software Technolgies for Embedded and …, 2010 | 222 | 2010 |
| Merasa: Multicore execution of hard real-time applications supporting analyzability T Ungerer, F Cazorla, P Sainrat, G Bernat, Z Petrov, C Rochange, ... IEEE Micro 30 (5), 66-75, 2010 | 201 | 2010 |
| Papabench: a free real-time benchmark F Nemer, H Cassé, P Sainrat, JP Bahsoun, M De Michiel 6th International Workshop on Worst-Case Execution Time Analysis (WCET'06), 2006 | 176 | 2006 |
| Multiple-block ahead branch predictors A Seznec, S Jourdan, P Sainrat, P Michaud ACM SIGPLAN Notices 31 (9), 116-127, 1996 | 141 | 1996 |
| Multiple-mode memory component D Litaize, JC Salinier, A Mzoughi, F Elkhlifi, M Lalam, P Sainrat US Patent 6,345,321, 2002 | 107 | 2002 |
| Static loop bound analysis of C programs based on flow analysis and abstract interpretation M De Michiel, A Bonenfant, H Cassé, P Sainrat 2008 14th IEEE International Conference on Embedded and Real-Time Computing …, 2008 | 76 | 2008 |
| High-performance embedded architecture and compilation roadmap K De Bosschere, W Luk, X Martorell, N Navarro, M O˘Boyle, ... Transactions on High-Performance Embedded Architectures and Compilers I, 5-29, 2007 | 74 | 2007 |
| parMERASA--multi-core execution of parallelised hard real-time applications supporting analysability T Ungerer, C Bradatsch, M Gerdes, F Kluge, R Jahr, J Mische, ... 2013 Euromicro Conference on Digital System Design, 363-370, 2013 | 71 | 2013 |
| Multiple-mode memory system D Litaize, JC Salinier, A Mzoughi, F Elkhlifi, M Lalama, P Sainrat US Patent App. 10/212,682, 2003 | 63 | 2003 |
| OTAWA, a framework for experimenting WCET computations H Cassé, P Sainrat Conference ERTS'06, 2006 | 58 | 2006 |
| A context-parameterized model for static analysis of execution times C Rochange, P Sainrat Transactions on High-Performance Embedded Architectures and Compilers II …, 2009 | 56 | 2009 |
| Automatic WCET analysis of real-time parallel applications H Ozaktas, C Rochange, P Sainrat 13th International Workshop on Worst-Case Execution Time Analysis, 2013 | 54 | 2013 |
| Exploring configurations of functional units in an out-of-order superscalar processor S Jourdan, P Sainrat, D Litaize Proceedings of the 22nd annual international symposium on Computer …, 1995 | 50 | 1995 |
| WCET analysis of a parallel 3D multigrid solver executed on the MERASA multi-core C Rochange, A Bonenfant, P Sainrat, M Gerdes, J Wolf, T Ungerer, ... 10th International Workshop on Worst-Case Execution Time Analysis (WCET 2010), 2010 | 48 | 2010 |
| Memory component with configurable multiple transfer formats D Litaize, J Salinier, A Mzoughi, F Elkhlifi, M Lalam, P Sainrat US Patent 6,748,509, 2004 | 42 | 2004 |
| Memory controller for synchronous burst transfers D Litaize, J Salinier, A Mzoughi, F Elkhlifi, M Lalam, P Sainrat US Patent 7,136,971, 2006 | 40 | 2006 |
| RTOS support for parallel execution of hard real-time applications on the MERASA multi-core processor J Wolf, M Gerdes, F Kluge, S Uhrig, J Mische, S Metzlaff, C Rochange, ... 2010 13th IEEE International Symposium on Object/Component/Service-Oriented …, 2010 | 39 | 2010 |
| Mapping hard real-time applications on many-core processors Q Perret, P Maurère, É Noulard, C Pagetti, P Sainrat, B Triquet Proceedings of the 24th International Conference on Real-Time Networks and …, 2016 | 37 | 2016 |
| Time analysable synchronisation techniques for parallelised hard real-time applications M Gerdes, F Kluge, T Ungerer, C Rochange, P Sainrat 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE), 671-676, 2012 | 37 | 2012 |
| Accurate analysis of memory latencies for WCET estimation R Bourgade, C Ballabriga, H Cassé, C Rochange, P Sainrat 16th international conference on real-time and network systems (RTNS 2008), 2008 | 37 | 2008 |
Christine RochangeUniversity of Toulouse, FranceVerified email at irit.fr
