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Kostas Tsoumanis
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Design-efficient approximate multiplication circuits through partial product perforation
G Zervakis, K Tsoumanis, S Xydis, D Soudris, K Pekmestzi
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (10 …, 2016
1612016
Delta DICE: A double node upset resilient latch
N Eftaxiopoulos, N Axelos, G Zervakis, K Tsoumanis, K Pekmestzi
2015 IEEE 58th International Midwest Symposium on Circuits and Systems …, 2015
812015
An Optimized Modified Booth Recoder for Efficient Design of the Add-Multiply Operator
K Tsoumanis, S Xydis, C Efstathiou, N Moschopoulos, K Pekmestzi
Circuits and Systems I: Regular Papers, IEEE Transactions on 61 (4), 1133 - 1143, 2014
732014
Hybrid approximate multiplier architectures for improved power-accuracy trade-offs
G Zervakis, S Xydis, K Tsoumanis, D Soudris, K Pekmestzi
2015 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2015
302015
Pre-encoded multipliers based on non-redundant radix-4 signed-digit encoding
K Tsoumanis, N Axelos, N Moschopoulos, G Zervakis, K Pekmestzi
IEEE Transactions on Computers 65 (2), 670-676, 2015
202015
Approximate Multiplier Architectures Through Partial Product Perforation: Power-Area Tradeoffs Analysis
G Zervakis, K Tsoumanis, S Xydis, N Axelos, K Pekmestzi
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, 229-232, 2015
192015
Flexible DSP Accelerator Architecture Exploiting Carry-Save Arithmetic
K Tsoumanis, S Xydis, G Zervakis, K Pekmestzi
IEEE Transactions On Very Large Scale Integration (Vlsi) Systems 24 (1), 368-372, 2015
102015
On the Design of Configurable Modulo 2^n±1 Residue Generators
C Efstathiou, N Moschopoulos, K Tsoumanis, K Pekmestzi
Digital System Design (DSD), 2012 15th Euromicro Conference on, 50-56, 2012
102012
Student Member, IEEE
K Tsoumanis
Sotiris Xydis, Constantinos Efstathiou, Nikos Moschopoulos, and Kiamal …, 2014
62014
A high radix Montgomery multiplier with concurrent error detection
G Zervakis, N Eftaxiopoulos, K Tsoumanis, N Axelos, K Pekmestzi
2014 9th International Design and Test Symposium (IDT), 199-204, 2014
52014
On the design of modulo 2n±1 residue generators
K Tsoumanis, C Efstathiou, N Moschopoulos, K Pekmestzi
2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration …, 2013
42013
Modulo 2n+1 addition and multiplication for redundant operands
K Tsoumanis, C Efstathiou, K Pekmestzi
2014 9th International Design and Test Symposium (IDT), 205-210, 2014
32014
Fused modulo 2n− 1 add-multiply unit
K Tsoumanis, K Pekmestzi, C Efstathiou
2014 21st IEEE international conference on electronics, circuits and systems …, 2014
32014
A radiation tolerant and self-repair memory cell
N Eftaxiopoulos-Sarris, G Zervakis, K Tsoumanis, K Pekrnestzi
2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 210-215, 2013
32013
Modulo 2n±1 Fused Add-Multiply Units
C Efstathiou, K Tsoumanis, K Pekmestzi, I Voyiatzis
2015 IEEE Computer Society Annual Symposium on VLSI, 91-96, 2015
22015
Efficient modulo 2^n+1 multiplication for the idea block cipher
K Pekmestzi, C Efstathiou, N Moschopoulos, K Tsoumanis
Proceedings of the 23rd ACM international conference on Great lakes …, 2013
22013
Efficient variability analysis of arithmetic units using linear regression techniques
D Stamoulis, K Tsoumanis, D Rodopoulos, BH Meyer, K Pekmestzi, ...
Analog Integrated Circuits and Signal Processing 87, 249-261, 2016
12016
An independent dual gate SOI FinFET soft-error resilient memory cell
N Eftaxiopoulos, N Axelos, G Zervakis, K Tsoumanis, K Pekmestzi
2014 9th International Design and Test Symposium (IDT), 39-44, 2014
12014
FF-DICE: An 8T soft-error tolerant cell using Independent Dual Gate SOI FinFETs
N Axelos, N Eftaxiopoulos, G Zervakis, K Tsoumanis, K Pekmestzi
2014 IEEE 20th International On-Line Testing Symposium (IOLTS), 200-201, 2014
12014
A segmentation-based BISR scheme
G Zervakis, N Eftaxiopoulos, K Tsoumanis, N Axelos, K Pekmestzi
Design Automation Conference (ASP-DAC), 2014 19th Asia and South Pacific …, 2014
12014
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