Skip-vias bypassing a metallization level at minimum pitch BD Briggs, LA Clevenger, BH DeProspo, H Huang, CJ Penny, ...
US Patent App. 10/083,905, 2018
41 * 2018 Dynamic rigidity mechanism BD Briggs, LA Clevenger, BH DeProspo, M RIZZOLO
US Patent App. 10/099,108, 2018
23 * 2018 Innovative Sub-5- F Liu, G Khurana, R Zhang, A Watanabe, BH DeProspo, C Nair, ...
IEEE Transactions on Components, Packaging and Manufacturing Technology 9 …, 2019
22 2019 Heterogeneous and homogeneous package integration technologies at device and system levels R Tummala, N Nedumthakady, S Ravichandran, B DeProspo, ...
2018 Pan Pacific Microelectronics Symposium (Pan Pacific), 1-5, 2018
21 2018 Heterogeneous integration for artificial intelligence: Challenges and opportunities S Mukhopadhyay, Y Long, B Mudassar, CS Nair, BH DeProspo, ...
IBM Journal of Research and Development 63 (6), 4: 1-4: 1, 2019
20 2019 Advances in High Performance RDL Technologies for Enabling IO Density of 500 IOs/mm/layer and 8-μm IO Pitch Using Low-k Dielectrics F Liu, R Zhang, BH DeProspo, S Dwarakanath, P Nimbalkar, ...
2020 IEEE 70th Electronic Components and Technology Conference (ECTC), 1132-1139, 2020
18 2020 Reliability Studies of Excimer Laser-Ablated Microvias Below 5 Micron Diameter in Dry Film Polymer Dielectrics for Next Generation, Panel-Scale 2.5 D Interposer RDL C Nair, B DeProspo, H Hichri, M Arendt, F Liu, V Sundaram, R Tummala
2018 IEEE 68th Electronic Components and Technology Conference (ECTC), 1005-1009, 2018
15 2018 Fundamental Interdiffusion Analysis of Ruthenium and Cobalt Films B DeProspo
15 2016 Smaller Microvias for Packaging Interconnects by Picosecond UV Laser With a Nanometer Metal Barrier Layer: A Feasibility Study F Liu, R Zhang, G Khurana, BH Deprospo, RR Tummala, M Swaminathan
IEEE Transactions on Components, Packaging and Manufacturing Technology 10 …, 2020
14 2020 Next Generation of 2-7 Micron Ultra-Small Microvias for 2.5 D Panel Redistribution Layer by Using Laser and Photolithography Technologies F Liu, C Nair, G Khurana, A Watanabe, BH DeProspo, A Kubo, CP Lin, ...
2019 IEEE 69th Electronic Components and Technology Conference (ECTC), 924-930, 2019
13 2019 Low-Cost 1- F Liu, C Nair, H Ito, BH DeProspo, S Ravichandran, H Akimaru, ...
IEEE Transactions on Components, Packaging and Manufacturing Technology 9 (7 …, 2019
11 2019 Glass Panel Packaging, as the Most Leading-Edge Packaging: Technologies and Applications R Tummala, B Deprospo, S Dwarakanath, S Ravichandran, P Nimbalkar, ...
2020 Pan Pacific Microelectronics Symposium (Pan Pacific), 1-5, 2020
9 2020 Skip-vias bypassing a metallization level at minimum pitch BD Briggs, LA Clevenger, BH DeProspo, H Huang, CJ Penny, M Rizzolo
US Patent 9,911,651, 2018
9 2018 Forming chamferless vias using thermally decomposable porefiller BD Briggs, LA Clevenger, BH DeProspo, H Huang, CJ Penny, MR Rizzolo
US Patent 9,685,366, 2017
8 2017 Integrated copper heat slugs and emi shields in panel laminate (lfo) and glass fanout (gfo) packages for high power rf ics V Sundaram, B Deprospo, N Gezgin, A Watanabe, PM Raj, F Liu, ...
2017 IEEE 67th Electronic Components and Technology Conference (ECTC), 300-305, 2017
8 2017 High-density MIM capacitors BD Briggs, LA Clevenger, BH DeProspo, H Huang, CJ Penny, ...
US Patent 10,229,967, 2019
7 * 2019 First Demonstration of Silicon-Like> 250 I/O Per mm Per Layer Multilayer RDL on Glass Panel Interposers by Embedded Photo-Trench and Fly Cut Planarization B DeProspo, F Liu, C Nair, A Kubo, F Wei, Y Chen, V Sundaram, ...
2018 IEEE 68th Electronic Components and Technology Conference (ECTC), 1152-1157, 2018
7 2018 Heterogeneous metallization using solid diffusion removal of metal interconnects BD Briggs, LA Clevenger, BH DeProspo, H Huang, CJ Penny, ...
US Patent App. 15/434,335, 2018
7 2018 Low Cost Panel-Based 1-2 Micron RDL Technologies with Lower Resistance than Si BEOL for Large Packages F Liu, H Ito, R Zhang, BH DeProspo, F Benthaus, H Akimaru, K Hasegawa, ...
2018 IEEE 68th Electronic Components and Technology Conference (ECTC), 613-618, 2018
6 2018 Structure of implementing a directed self-assembled security pattern BD Briggs, LA Clevenger, BH DeProspo, M Rizzolo
US Patent 10,752,039, 2020
5 2020 
Michael RizzoloIBMΗ διεύθυνση ηλεκτρονικού ταχυδρομείου έχει επαληθευτεί στον τομέα us.ibm.com
