| A configurable cloud-scale DNN processor for real-time AI J Fowers, K Ovtcharov, M Papamichael, T Massengill, M Liu, D Lo, ... 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture …, 2018 | 699 | 2018 |
| Serving dnns in real time at datacenter scale with project brainwave E Chung, J Fowers, K Ovtcharov, M Papamichael, A Caulfield, ... iEEE Micro 38 (2), 8-20, 2018 | 399 | 2018 |
| GraphGen: An FPGA framework for vertex-centric graph computation E Nurvitadhi, G Weisz, Y Wang, S Hurkat, M Nguyen, JC Hoe, JF Martínez, ... 2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom …, 2014 | 165 | 2014 |
| A configurable cloud-scale dnn processor for real-time ai. In 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture (ISCA) J Fowers, K Ovtcharov, M Papamichael, T Massengill, M Liu, D Lo, ... IEEE. https://doi. org/10.1109/isca, 2018 | 78 | 2018 |
| Neural network processor based on application specific synthesis specialization parameters J Fowers, K Ovtcharov, ES Chung, TM Massengill, MG Liu, GL Weisz US Patent 11,556,762, 2023 | 53 | 2023 |
| A study of pointer-chasing performance on shared-memory processor-FPGA systems G Weisz, J Melber, Y Wang, K Fleming, E Nurvitadhi, JC Hoe Proceedings of the 2016 ACM/SIGDA International Symposium on Field …, 2016 | 53 | 2016 |
| Evaluating rapid application development with python for heterogeneous processor-based fpgas AG Schmidt, G Weisz, M French 2017 IEEE 25th Annual International Symposium on Field-Programmable Custom …, 2017 | 42 | 2017 |
| CoRAM++: Supporting data-structure-specific memory interfaces for FPGA computing G Weisz, JC Hoe 2015 25th International conference on field programmable logic and …, 2015 | 32 | 2015 |
| SpaceCubeX: A framework for evaluating hybrid multi-core CPU/FPGA/DSP architectures AG Schmidt, G Weisz, M French, T Flatley, CY Villalpando 2017 IEEE Aerospace Conference, 1-10, 2017 | 23 | 2017 |
| Method and apparatus for analyzing patient medical records US Patent 8,326,653, 0 | 20* | |
| Prototype and evaluation of the coram memory architecture for fpga-based computing ES Chung, MK Papamichael, G Weisz, JC Hoe, K Mai Proceedings of the ACM/SIGDA international symposium on Field Programmable …, 2012 | 19 | 2012 |
| Inside Project Brainwave's Cloud-Scale, Real-Time AI Processor J Fowers, K Ovtcharov, MK Papamichael, T Massengill, M Liu, D Lo, ... IEEE Micro 39 (3), 20-28, 2019 | 16 | 2019 |
| High performance linkage disequilibrium: FPGAs hold the key N Alachiotis, G Weisz Proceedings of the 2016 ACM/SIGDA International Symposium on Field …, 2016 | 14 | 2016 |
| C-to-coram: Compiling perfect loop nests to the portable coram abstraction G Weisz, JC Hoe Proceedings of the ACM/SIGDA international symposium on Field programmable …, 2013 | 14 | 2013 |
| Graphgen for coram: Graph computation on FPGAs G Weisz, E Nurvitadhi, J Hoe Workshop on the Intersections of Computer Architecture and Reconfigurable Logic, 2013 | 11 | 2013 |
| Method and apparatus for performing concurrent patient coding for hospitals M Gottlieb, G Weisz, T Johnson US Patent App. 11/033,062, 2005 | 7 | 2005 |
| Matrix vector multiplier with a vector register file comprising a multi-port memory US Patent 10,795,678, 0 | 7* | |
| Vecpac: A vectorizable and precision-aware cgra C Tan, D Patil, A Tumeo, G Weisz, S Reinhardt, J Zhang 2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD), 1-9, 2023 | 4 | 2023 |
| Cross-platform FPGA accelerator development using CoRAM and CONNECT ES Chung, MK Papamichael, G Weisz, JC Hoe Proceedings of the ACM/SIGDA international symposium on Field programmable …, 2013 | 2 | 2013 |
| RETROSPECTIVE: A Configurable Cloud-Scale DNN Processor for Real-Time AI ES Chung, D Burger, J Fowers, M Ghandi, G Weisz, S Lanka, ... ISCA 50, 1996-2020, 0 | 2 | |
Eric S ChungVP of AI Computing, NVIDIAVerified email at nvidia.com
