Παρακολούθηση
Angshuman Parashar
Angshuman Parashar
Sr. Research Scientist, NVIDIA
Η διεύθυνση ηλεκτρονικού ταχυδρομείου έχει επαληθευτεί στον τομέα nvidia.com - Αρχική σελίδα
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SCNN: An accelerator for compressed-sparse convolutional neural networks
A Parashar, M Rhu, A Mukkara, A Puglielli, R Venkatesan, B Khailany, ...
ACM SIGARCH computer architecture news 45 (2), 27-40, 2017
15312017
Timeloop: A systematic approach to dnn accelerator evaluation
A Parashar, P Raina, YS Shao, YH Chen, VA Ying, A Mukkara, ...
2019 IEEE international symposium on performance analysis of systems and …, 2019
5042019
Sparse convolutional neural network accelerator
WJ Dally, A Parashar, JS Emer, SW Keckler, LR Dennison
US Patent 10,891,538, 2021
4332021
Understanding reuse, performance, and hardware cost of dnn dataflow: A data-centric approach
H Kwon, P Chatarasi, M Pellauer, A Parashar, V Sarkar, T Krishna
Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019
3482019
Sparse convolutional neural network accelerator
WJ Dally, A Parashar, JS Emer, SW Keckler, LR Dennison
US Patent 10,528,864, 2020
3272020
Sparse convolutional neural network accelerator
WJ Dally, A Parashar, JS Emer, SW Keckler, LR Dennison
US Patent 10,860,922, 2020
2572020
Maestro: A data-centric approach to understand reuse, performance, and hardware cost of dnn mappings
H Kwon, P Chatarasi, V Sarkar, T Krishna, M Pellauer, A Parashar
IEEE micro 40 (3), 20-29, 2020
2072020
Triggered instructions: A control paradigm for spatially-programmed architectures
A Parashar, M Pellauer, M Adler, B Ahsan, N Crago, D Lustig, V Pavlov, ...
ACM SIGARCH Computer Architecture News 41 (3), 142-153, 2013
1712013
Yakun Sophia Shao, Yu-Hsin Chen, Victor A. Ying, Anurag Mukkara, Rangharajan Venkatesan, Brucek Khailany, Stephen W. Keckler, and Joel Emer. 2019. Timeloop: A Systematic …
A Parashar, P Raina
2019 IEEE international symposium on performance analysis of systems and …, 2019
1682019
HAsim: FPGA-based high-detail multicore simulation using time-division multiplexing
M Pellauer, M Adler, M Kinsy, A Parashar, J Emer
2011 IEEE 17th International Symposium on High Performance Computer …, 2011
1552011
Leap scratchpads: automatic memory and cache management for reconfigurable logic
M Adler, KE Fleming, A Parashar, M Pellauer, J Emer
Proceedings of the 19th ACM/SIGDA international symposium on Field …, 2011
1382011
Mind mappings: enabling efficient algorithm-accelerator mapping space search
K Hegde, PA Tsai, S Huang, V Chandra, A Parashar, CW Fletcher
Proceedings of the 26th ACM International Conference on Architectural …, 2021
1142021
Mechanisms for bounding vulnerabilities of processor structures
NK Soundararajan, A Parashar, A Sivasubramaniam
Proceedings of the 34th annual international symposium on Computer …, 2007
832007
Leveraging latency-insensitivity to ease multiple FPGA design
KE Fleming, M Adler, M Pellauer, A Parashar, A Mithal, J Emer
Proceedings of the ACM/SIGDA international symposium on Field Programmable …, 2012
782012
SlicK: slice-based locality exploitation for efficient redundant multithreading
A Parashar, A Sivasubramaniam, S Gurumurthi
ACM SIGOPS Operating Systems Review 40 (5), 95-105, 2006
762006
Sparse convolutional neural network accelerator
WJ Dally, A Parashar, JS Emer, SW Keckler, LR Dennison
US Patent 10,997,496, 2021
732021
A complexity-effective approach to alu bandwidth enhancement for instruction-level temporal redundancy
A Parashar, S Gurumurthi, A Sivasubramaniam
ACM SIGARCH Computer Architecture News 32 (2), 376, 2004
712004
Sparseloop: An analytical approach to sparse tensor accelerator modeling
YN Wu, PA Tsai, A Parashar, V Sze, JS Emer
2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO …, 2022
642022
Marvel: A data-centric approach for mapping deep learning operators on spatial accelerators
P Chatarasi, H Kwon, A Parashar, M Pellauer, T Krishna, V Sarkar
ACM Transactions on Architecture and Code Optimization (TACO) 19 (1), 1-26, 2021
572021
Executing distributed memory operations using processing elements connected by distributed channels
B Ahsan, MC Adler, NC Crago, JS Emer, A Jaleel, A Parashar, ...
US Patent 10,331,583, 2019
562019
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