| Data and memory optimization techniques for embedded systems PR Panda, F Catthoor, ND Dutt, K Danckaert, E Brockmeyer, C Kulkarni, ... ACM Transactions on Design Automation of Electronic Systems (TODAES) 6 (2 …, 2001 | 544 | 2001 |
| Efficient utilization of scratch-pad memory in embedded processor applications PR Panda, ND Dutt, A Nicolau Proceedings European Design and Test Conference. ED & TC 97, 7-11, 1997 | 410 | 1997 |
| Memory issues in embedded systems-on-chip: optimizations and exploration PR Panda, ND Dutt, A Nicolau Springer Science & Business Media, 1999 | 351 | 1999 |
| On-chip vs. off-chip memory: the data partitioning problem in embedded processor-based systems PR Panda, ND Dutt, A Nicolau ACM Transactions on Design Automation of Electronic Systems (TODAES) 5 (3 …, 2000 | 344 | 2000 |
| SystemC: a modeling platform supporting multiple design abstractions PR Panda Proceedings of the 14th international symposium on Systems synthesis, 75-80, 2001 | 319 | 2001 |
| Power-efficient system design PR Panda, BVN Silpa, A Shrivastava, K Gummidipudi Springer Science & Business Media, 2010 | 168 | 2010 |
| Augmenting loop tiling with data alignment for improved cache performance PR Panda, H Nakamura, ND Dutt, A Nicolau IEEE transactions on computers 48 (2), 142-149, 1999 | 160 | 1999 |
| Low-power memory mapping through reducing address bus activity PR Panda, ND Dutt IEEE Transactions on Very Large Scale Integration (VLSI) Systems 7 (3), 309-320, 1999 | 113 | 1999 |
| 1995 high level synthesis design repository PR Panda, ND Dutt Proceedings of the 8th international symposium on System synthesis, 170-174, 1995 | 112 | 1995 |
| Reducing address bus transition for low power memory mapping PR Panda, ND Dutt Proceedings ED&TC European Design and Test Conference, 63-68, 1996 | 109 | 1996 |
| Architectural exploration and optimization of local memory in embedded systems PR Panda, ND Dutt, A Nicolau Proceedings. Tenth International Symposium on System Synthesis (Cat. No …, 1997 | 104 | 1997 |
| Local memory exploration and optimization in embedded systems PR Panda, ND Dutt, A Nicolau IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1999 | 102 | 1999 |
| Data memory organization and optimizations in application-specific systems PR Panda, ND Dutt, A Nicolau, F Catthoor, A Vandecappelle, ... IEEE Design & Test of Computers 18 (3), 56-68, 2001 | 98 | 2001 |
| Memory data organization for improved cache performance in embedded processor applications PR Panda, ND Dutt, A Nicolau ACM Transactions on Design Automation of Electronic Systems (TODAES) 2 (4 …, 1997 | 90 | 1997 |
| Memory organization for improved data cache performance in embedded processors P Panda, N Dutt, A Nicolau Proceedings of 9th International Symposium on Systems Synthesis, 90-95, 1996 | 74 | 1996 |
| Memory organization for improved data cache performance in embedded processors P Panda, N Dutt, A Nicolau Proceedings of 9th International Symposium on Systems Synthesis, 90-95, 1996 | 74 | 1996 |
| Memory organization for improved data cache performance in embedded processors PR Panda, ND Dutt, A Nicolau Proceedings of 1996 International Symposium on System Synthesis, 90-95, 1996 | 74 | 1996 |
| Memory bank customization and assignment in behavioral synthesis PR Panda 1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of …, 1999 | 70 | 1999 |
| Exploiting off-chip memory access modes in high-level synthesis Panda, Dutt, Nicolau 1997 Proceedings of IEEE International Conference on Computer Aided Design …, 1997 | 58 | 1997 |
| The impact of loop unrolling on controller delay in high level synthesis S Kurra, NK Singh, PR Panda Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE'07, 1-6, 2007 | 46 | 2007 |
